2 * Copyright (C) 2016 Piotr Dymacz <piotr@dymacz.pl>
4 * This file contains the configuration parameters
5 * for Qualcomm Atheros QCA953x based devices
7 * Reference designs: AP143
9 * SPDX-License-Identifier: GPL-2.0
16 #include <configs/qca9k_common.h>
17 #include <soc/soc_common.h>
24 #if defined(CONFIG_FOR_COMFAST_CF_E314N)
26 #define CONFIG_QCA_GPIO_MASK_LED_ACT_H GPIO4 | GPIO11 | GPIO14 |\
28 #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO0 | GPIO2 | GPIO3
29 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_H |\
30 CONFIG_QCA_GPIO_MASK_LED_ACT_L
31 #define CONFIG_QCA_GPIO_MASK_IN GPIO17
32 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
33 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
35 #elif defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
37 #define CONFIG_QCA_GPIO_MASK_LED_ACT_H GPIO0 | GPIO2 | GPIO3
38 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_H
39 #define CONFIG_QCA_GPIO_MASK_IN GPIO11 | GPIO12 | GPIO14 |\
41 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
43 #elif defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
44 defined(CONFIG_FOR_COMFAST_CF_E530N)
46 #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO11
47 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_L
48 #define CONFIG_QCA_GPIO_MASK_IN GPIO17
49 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
51 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
52 defined(CONFIG_FOR_TPLINK_WR802N)
54 #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO13
55 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_L
56 #define CONFIG_QCA_GPIO_MASK_IN GPIO12
57 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
59 #elif defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
60 defined(CONFIG_FOR_TPLINK_WR841N_V9)
62 #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO3 | GPIO4 | GPIO11 |\
63 GPIO13 | GPIO14 | GPIO15 |\
65 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_L
66 #define CONFIG_QCA_GPIO_MASK_IN GPIO12 | GPIO17
67 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
69 #elif defined(CONFIG_FOR_TPLINK_WR841N_V11)
71 #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO1 | GPIO2 | GPIO3 |\
72 GPIO4 | GPIO11 | GPIO13 |\
73 GPIO14 | GPIO15 | GPIO16
74 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_L
75 #define CONFIG_QCA_GPIO_MASK_IN GPIO12 | GPIO17
76 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
78 #elif defined(CONFIG_FOR_WALLYS_DR531)
80 #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO11 | GPIO12 | GPIO13 |\
81 GPIO14 | GPIO15 | GPIO16
82 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_L
83 #define CONFIG_QCA_GPIO_MASK_IN GPIO17
84 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
86 #elif defined(CONFIG_FOR_YUNCORE_AP90Q)
88 #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO4 | GPIO12 | GPIO16
89 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_L
90 #define CONFIG_QCA_GPIO_MASK_IN GPIO17
91 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
93 #elif defined(CONFIG_FOR_YUNCORE_CPE830)
95 #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO0 | GPIO1 | GPIO2 |\
96 GPIO3 | GPIO4 | GPIO12 |\
98 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_L
99 #define CONFIG_QCA_GPIO_MASK_IN GPIO17
100 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
102 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
104 #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO4 | GPIO11 | GPIO12 |\
105 GPIO13 | GPIO14 | GPIO15 |\
107 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_L
108 #define CONFIG_QCA_GPIO_MASK_IN GPIO17
109 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
118 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
119 defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
121 #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
122 "rootfstype=jffs2 init=/sbin/init "\
123 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),14656k(rootfs),64k(mib0)"
125 #elif defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
126 defined(CONFIG_FOR_COMFAST_CF_E530N)
128 #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
129 "rootfstype=jffs2 init=/sbin/init "\
130 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),6464k(rootfs),64k(mib0)"
132 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN)
134 #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
135 "rootfstype=squashfs init=/sbin/init "\
136 "mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(art)"
138 #elif defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
139 defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
140 defined(CONFIG_FOR_TPLINK_WR841N_V9) ||\
141 defined(CONFIG_FOR_TPLINK_WR802N)
143 #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
144 "rootfstype=squashfs init=/sbin/init "\
145 "mtdparts=ath-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
147 #elif defined(CONFIG_FOR_WALLYS_DR531)
149 #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
150 "rootfstype=jffs2 init=/sbin/init "\
151 "mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k"
153 #elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
154 defined(CONFIG_FOR_YUNCORE_CPE830) ||\
155 defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
157 #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
158 "rootfstype=squashfs init=/sbin/init "\
159 "mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),14528k(rootfs),1472k(kernel),64k(art),16000k(firmware)"
164 * =============================
165 * Load address and boot command
166 * =============================
168 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
169 defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
170 defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
171 defined(CONFIG_FOR_COMFAST_CF_E530N) ||\
172 defined(CONFIG_FOR_TPLINK_WR802N) ||\
173 defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
174 defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
175 defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
176 defined(CONFIG_FOR_TPLINK_WR841N_V9)
177 #define CFG_LOAD_ADDR 0x9F020000
178 #elif defined(CONFIG_FOR_WALLYS_DR531) ||\
179 defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
180 defined(CONFIG_FOR_YUNCORE_CPE830) ||\
181 defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
182 #define CFG_LOAD_ADDR 0x9F050000
185 #if defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
186 defined(CONFIG_FOR_YUNCORE_CPE830) ||\
187 defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
188 #define CONFIG_BOOTCOMMAND "bootm 0x9FE80000 || bootm 0x9F050000"
190 #define CONFIG_BOOTCOMMAND "bootm " MK_STR(CFG_LOAD_ADDR)
194 * =========================
195 * Environment configuration
196 * =========================
198 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
199 defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
200 defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
201 defined(CONFIG_FOR_COMFAST_CF_E530N)
202 #define CFG_ENV_ADDR 0x9F018000
203 #define CFG_ENV_SIZE 0x7C00
204 #define CFG_ENV_SECT_SIZE 0x10000
205 #elif defined(CONFIG_FOR_TPLINK_WR802N) ||\
206 defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
207 defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
208 defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
209 defined(CONFIG_FOR_TPLINK_WR841N_V9)
210 #define CFG_ENV_ADDR 0x9F01EC00
211 #define CFG_ENV_SIZE 0x1000
212 #define CFG_ENV_SECT_SIZE 0x10000
213 #elif defined(CONFIG_FOR_WALLYS_DR531)
214 #define CFG_ENV_ADDR 0x9F030000
215 #define CFG_ENV_SIZE 0xF800
216 #define CFG_ENV_SECT_SIZE 0x10000
217 #elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
218 defined(CONFIG_FOR_YUNCORE_CPE830) ||\
219 defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
220 #define CFG_ENV_ADDR 0x9F040000
221 #define CFG_ENV_SIZE 0xFC00
222 #define CFG_ENV_SECT_SIZE 0x10000
226 * ===========================
227 * List of available baudrates
228 * ===========================
230 #define CFG_BAUDRATE_TABLE \
231 { 600, 1200, 2400, 4800, 9600, 14400, \
232 19200, 28800, 38400, 56000, 57600, 115200 }
235 * ==================================================
236 * MAC address/es, model and WPS pin offsets in FLASH
237 * ==================================================
239 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
240 defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
241 defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
242 defined(CONFIG_FOR_COMFAST_CF_E530N)
243 #define OFFSET_MAC_DATA_BLOCK 0x10000
244 #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x10000
245 #define OFFSET_MAC_ADDRESS 0x00000
246 #elif defined(CONFIG_FOR_TPLINK_WR802N) ||\
247 defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
248 defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
249 defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
250 defined(CONFIG_FOR_TPLINK_WR841N_V9)
251 #define OFFSET_MAC_DATA_BLOCK 0x010000
252 #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x010000
253 #define OFFSET_MAC_ADDRESS 0x00FC00
254 #define OFFSET_ROUTER_MODEL 0x00FD00
255 #define OFFSET_PIN_NUMBER 0x00FE00
256 #elif defined(CONFIG_FOR_WALLYS_DR531)
257 #define OFFSET_MAC_DATA_BLOCK 0x030000
258 #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x010000
259 #define OFFSET_MAC_ADDRESS 0x00F810
260 #elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
261 defined(CONFIG_FOR_YUNCORE_CPE830) ||\
262 defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
263 #define OFFSET_MAC_DATA_BLOCK 0xFF0000
264 #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x010000
265 #define OFFSET_MAC_ADDRESS 0x000000
269 * =========================
270 * Custom changes per device
271 * =========================
275 * Comfast CF-E520N and E320Nv2 are limited to 64 KB only,
276 * disable some commands
278 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
279 defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
280 defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
281 defined(CONFIG_FOR_COMFAST_CF_E530N)
282 #undef CONFIG_CMD_DHCP
283 #undef CONFIG_CMD_LOADB
284 #undef CONFIG_CMD_SNTP
288 * ===========================
289 * HTTP recovery configuration
290 * ===========================
292 #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS CFG_LOAD_ADDR
294 /* Firmware size limit */
295 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
296 defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
297 defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
298 defined(CONFIG_FOR_COMFAST_CF_E530N) ||\
299 defined(CONFIG_FOR_TPLINK_WR802N) ||\
300 defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
301 defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
302 defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
303 defined(CONFIG_FOR_TPLINK_WR841N_V9)
304 #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES (192 * 1024)
305 #elif defined(CONFIG_FOR_WALLYS_DR531) ||\
306 defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
307 defined(CONFIG_FOR_YUNCORE_CPE830) ||\
308 defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
309 #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES (384 * 1024)
313 * ========================
314 * PLL/Clocks configuration
315 * ========================
317 #if defined(CONFIG_FOR_TPLINK_WR802N) ||\
318 defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
319 defined(CONFIG_FOR_TPLINK_WR841N_V9)
320 #define CONFIG_QCA_PLL QCA_PLL_PRESET_550_400_200
322 #define CONFIG_QCA_PLL QCA_PLL_PRESET_650_400_200
325 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
326 defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
327 defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
328 defined(CONFIG_FOR_COMFAST_CF_E530N) ||\
329 defined(CONFIG_FOR_TPLINK_WR802N) ||\
330 defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
331 defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
332 defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
333 defined(CONFIG_FOR_TPLINK_WR841N_V9)
335 #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET 0x10000
336 #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE 0x10000
338 #elif defined(CONFIG_FOR_WALLYS_DR531)
340 #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET 0x30000
341 #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE 0x10000
343 #elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
344 defined(CONFIG_FOR_YUNCORE_CPE830) ||\
345 defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
347 #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET 0x40000
348 #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE 0x10000
353 * ==================================
354 * For upgrade scripts in environment
355 * ==================================
357 #if !defined(CONFIG_FOR_COMFAST_CF_E314N) &&\
358 !defined(CONFIG_FOR_COMFAST_CF_E320N_V2) &&\
359 !defined(CONFIG_FOR_COMFAST_CF_E520N) &&\
360 !defined(CONFIG_FOR_COMFAST_CF_E530N) &&\
361 !defined(CONFIG_FOR_WALLYS_DR531) &&\
362 !defined(CONFIG_FOR_YUNCORE_AP90Q) &&\
363 !defined(CONFIG_FOR_YUNCORE_CPE830) &&\
364 !defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
365 #define CONFIG_UPG_UBOOT_SIZE_BACKUP_HEX 0x20000
368 #if defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
369 defined(CONFIG_FOR_YUNCORE_CPE830) ||\
370 defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
371 #define CONFIG_UPG_SCRIPTS_FW_ADDR_HEX 0x9F050000
375 * ===================
376 * Other configuration
377 * ===================
380 /* Cache lock for stack */
381 #define CONFIG_INIT_SRAM_SP_OFFSET 0xbd001800
383 #endif /* _AP143_H */