2 * Qualcomm/Atheros common/helper functions
4 * Copyright (C) 2015 Piotr Dymacz <piotr@dymacz.pl>
7 * Linux/arch/mips/ath79/setup.c
9 * SPDX-License-Identifier:GPL-2.0
14 #include <asm/addrspace.h>
15 #include <soc/qca_soc_common.h>
18 * Returns 1 if reference clock is 40 MHz
20 inline u32 qca_xtal_is_40mhz(void)
22 return ((qca_soc_reg_read(QCA_RST_BOOTSTRAP_REG) &
23 QCA_RST_BOOTSTRAP_REF_CLK_MASK) >> QCA_RST_BOOTSTRAP_REF_CLK_SHIFT);
27 * Return memory type value from BOOT_STRAP register
29 inline u32 qca_mem_type(void)
31 return ((qca_soc_reg_read(QCA_RST_BOOTSTRAP_REG) &
32 QCA_RST_BOOTSTRAP_MEM_TYPE_MASK) >> QCA_RST_BOOTSTRAP_MEM_TYPE_SHIFT);
36 * Put QCA SOC name, version and revision in buffer
38 void qca_soc_name_rev(char *buf)
47 /* Get revision ID value */
48 id = qca_soc_reg_read(QCA_RST_REVISION_ID_REG);
50 major = id & QCA_RST_REVISION_ID_MAJOR_MASK;
51 rev = id & QCA_RST_REVISION_ID_REV_MASK;
54 #if (SOC_TYPE & QCA_AR933X_SOC)
55 case QCA_RST_REVISION_ID_MAJOR_AR9330_VAL:
56 sprintf(buf, "AR9330 rev. %d", rev);
58 case QCA_RST_REVISION_ID_MAJOR_AR9331_VAL:
59 sprintf(buf, "AR9331 rev. %d", rev);
62 #if (SOC_TYPE & QCA_AR934X_SOC)
63 case QCA_RST_REVISION_ID_MAJOR_AR9341_VAL:
64 sprintf(buf, "AR9341 rev. %d", rev);
66 case QCA_RST_REVISION_ID_MAJOR_AR9344_VAL:
67 sprintf(buf, "AR9344 rev. %d", rev);
70 #if (SOC_TYPE & QCA_QCA953X_SOC)
71 case QCA_RST_REVISION_ID_MAJOR_QCA953X_VAL:
72 sprintf(buf, "QCA953x ver. 1 rev. %d", rev);
74 case QCA_RST_REVISION_ID_MAJOR_QCA953X_V2_VAL:
75 sprintf(buf, "QCA953x ver. 2 rev. %d", rev);
78 #if (SOC_TYPE & QCA_QCA955X_SOC)
79 case QCA_RST_REVISION_ID_MAJOR_QCA9558_VAL:
80 sprintf(buf, "QCA9558 rev. %d", rev);
84 sprintf(buf, "Unknown");
90 * Performs full chip reset
92 void qca_full_chip_reset(void)
97 qca_soc_reg_write(QCA_RST_RST_REG,
98 QCA_RST_RESET_FULL_CHIP_RST_MASK
99 | QCA_RST_RESET_DDR_RST_MASK);