3 #include <asm/mipsregs.h>
4 #include <asm/addrspace.h>
7 #include "ar7240_soc.h"
9 #if !defined(COMPRESSED_UBOOT)
10 extern void hornet_ddr_init(void);
13 extern int ar7240_ddr_find_size(void);
14 extern void hornet_ddr_tap_init(void);
16 #define SETBITVAL(val, pos, bit) do {ulong bitval = (bit) ? 0x1 : 0x0; (val) = ((val) & ~(0x1 << (pos))) | ( (bitval) << (pos));} while(0)
18 void led_toggle(void){
21 gpio = ar7240_reg_rd(AR7240_GPIO_OUT);
23 #if defined(CONFIG_FOR_TPLINK_MR3020_V1)
24 gpio ^= 1 << GPIO_WPS_LED_BIT;
25 #elif defined(CONFIG_FOR_TPLINK_WR703N_V1) || defined(CONFIG_FOR_TPLINK_WR720N_V3) || defined(CONFIG_FOR_TPLINK_WR710N_V1)
26 gpio ^= 1 << GPIO_SYS_LED_BIT;
27 #elif defined(CONFIG_FOR_TPLINK_MR3040_V1V2)
28 gpio ^= 1 << GPIO_INTERNET_LED_BIT;
29 #elif defined(CONFIG_FOR_TPLINK_MR10U_V1) || defined(CONFIG_FOR_TPLINK_MR13U_V1)
30 gpio ^= 1 << GPIO_SYS_LED_BIT;
31 #elif defined(CONFIG_FOR_TPLINK_WR740N_V4) || defined(CONFIG_FOR_TPLINK_MR3220_V2)
32 gpio ^= 1 << GPIO_SYS_LED_BIT;
33 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
34 gpio ^= 1 << GPIO_SYS_LED_BIT;
35 #elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
36 gpio ^= 1 << GPIO_SYS_LED_BIT;
37 #elif defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
38 gpio ^= 1 << GPIO_WLAN_LED_BIT;
39 #elif defined(CONFIG_FOR_DRAGINO_V2) || defined(CONFIG_FOR_MESH_POTATO_V2)
40 gpio ^= 1 << GPIO_WLAN_LED_BIT;
41 #elif defined(CONFIG_FOR_BSB)
42 gpio ^= 1 << GPIO_SYS_LED_BIT;
43 #elif defined(CONFIG_FOR_GL_INET)
44 gpio ^= 1 << GPIO_WLAN_LED_BIT;
46 #error "Custom GPIO in leg_toggle() not defined!"
49 ar7240_reg_wr(AR7240_GPIO_OUT, gpio);
52 void all_led_on(void){
55 gpio = ar7240_reg_rd(AR7240_GPIO_OUT);
57 #if defined(CONFIG_FOR_TPLINK_MR3020_V1)
58 SETBITVAL(gpio, GPIO_WPS_LED_BIT, GPIO_WPS_LED_ON);
59 SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, GPIO_INTERNET_LED_ON);
60 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, GPIO_WLAN_LED_ON);
61 SETBITVAL(gpio, GPIO_ETH_LED_BIT, GPIO_ETH_LED_ON);
62 #elif defined(CONFIG_FOR_TPLINK_WR703N_V1) || defined(CONFIG_FOR_TPLINK_WR720N_V3) || defined (CONFIG_FOR_TPLINK_WR710N_V1)
63 SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
64 #elif defined(CONFIG_FOR_TPLINK_MR3040_V1V2)
65 SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, GPIO_INTERNET_LED_ON);
66 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, GPIO_WLAN_LED_ON);
67 SETBITVAL(gpio, GPIO_ETH_LED_BIT, GPIO_ETH_LED_ON);
68 #elif defined(CONFIG_FOR_TPLINK_MR10U_V1) || defined(CONFIG_FOR_TPLINK_MR13U_V1)
69 SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
70 #elif defined(CONFIG_FOR_TPLINK_WR740N_V4) || defined(CONFIG_FOR_TPLINK_MR3220_V2)
71 SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
72 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, GPIO_WLAN_LED_ON);
73 SETBITVAL(gpio, GPIO_LAN1_LED_BIT, GPIO_LAN1_LED_ON);
74 SETBITVAL(gpio, GPIO_LAN2_LED_BIT, GPIO_LAN2_LED_ON);
75 SETBITVAL(gpio, GPIO_LAN3_LED_BIT, GPIO_LAN3_LED_ON);
76 SETBITVAL(gpio, GPIO_LAN4_LED_BIT, GPIO_LAN4_LED_ON);
77 SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, GPIO_INTERNET_LED_ON);
78 SETBITVAL(gpio, GPIO_QSS_LED_BIT, GPIO_QSS_LED_ON);
80 #ifdef CONFIG_FOR_TPLINK_MR3220_V2
81 SETBITVAL(gpio, GPIO_USB_LED_BIT, GPIO_USB_LED_ON);
83 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
84 SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
85 #elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
86 SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
87 SETBITVAL(gpio, GPIO_WAN_LED_BIT, GPIO_WAN_LED_ON);
88 SETBITVAL(gpio, GPIO_LAN1_LED_BIT, GPIO_LAN1_LED_ON);
89 SETBITVAL(gpio, GPIO_LAN2_LED_BIT, GPIO_LAN2_LED_ON);
90 #elif defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
91 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, GPIO_WLAN_LED_ON);
92 #elif defined(CONFIG_FOR_DRAGINO_V2) || defined(CONFIG_FOR_MESH_POTATO_V2)
93 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, GPIO_WLAN_LED_ON);
94 SETBITVAL(gpio, GPIO_WAN_LED_BIT, GPIO_WAN_LED_ON);
95 SETBITVAL(gpio, GPIO_LAN_LED_BIT, GPIO_LAN_LED_ON);
96 SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, GPIO_INTERNET_LED_ON);
97 #elif defined(CONFIG_FOR_BSB)
98 SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
99 #elif defined(CONFIG_FOR_GL_INET)
100 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, GPIO_WLAN_LED_ON);
101 SETBITVAL(gpio, GPIO_LAN_LED_BIT, GPIO_LAN_LED_ON);
103 #error "Custom GPIO in all_led_on() not defined!"
106 ar7240_reg_wr(AR7240_GPIO_OUT, gpio);
109 void all_led_off(void){
112 gpio = ar7240_reg_rd(AR7240_GPIO_OUT);
114 #if defined(CONFIG_FOR_TPLINK_MR3020_V1)
115 SETBITVAL(gpio, GPIO_WPS_LED_BIT, !GPIO_WPS_LED_ON);
116 SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, !GPIO_INTERNET_LED_ON);
117 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, !GPIO_WLAN_LED_ON);
118 SETBITVAL(gpio, GPIO_ETH_LED_BIT, !GPIO_ETH_LED_ON);
119 #elif defined(CONFIG_FOR_TPLINK_WR703N_V1) || defined(CONFIG_FOR_TPLINK_WR720N_V3) || defined (CONFIG_FOR_TPLINK_WR710N_V1)
120 SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
121 #elif defined(CONFIG_FOR_TPLINK_MR3040_V1V2)
122 SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, !GPIO_INTERNET_LED_ON);
123 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, !GPIO_WLAN_LED_ON);
124 SETBITVAL(gpio, GPIO_ETH_LED_BIT, !GPIO_ETH_LED_ON);
125 #elif defined(CONFIG_FOR_TPLINK_MR10U_V1) || defined(CONFIG_FOR_TPLINK_MR13U_V1)
126 SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
127 #elif defined(CONFIG_FOR_TPLINK_WR740N_V4) || defined(CONFIG_FOR_TPLINK_MR3220_V2)
128 SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
129 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, !GPIO_WLAN_LED_ON);
130 SETBITVAL(gpio, GPIO_LAN1_LED_BIT, !GPIO_LAN1_LED_ON);
131 SETBITVAL(gpio, GPIO_LAN2_LED_BIT, !GPIO_LAN2_LED_ON);
132 SETBITVAL(gpio, GPIO_LAN3_LED_BIT, !GPIO_LAN3_LED_ON);
133 SETBITVAL(gpio, GPIO_LAN4_LED_BIT, !GPIO_LAN4_LED_ON);
134 SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, !GPIO_INTERNET_LED_ON);
135 SETBITVAL(gpio, GPIO_QSS_LED_BIT, !GPIO_QSS_LED_ON);
137 #ifdef CONFIG_FOR_TPLINK_MR3220_V2
138 SETBITVAL(gpio, GPIO_USB_LED_BIT, !GPIO_USB_LED_ON);
140 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
141 SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
142 #elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
143 SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
144 SETBITVAL(gpio, GPIO_WAN_LED_BIT, !GPIO_WAN_LED_ON);
145 SETBITVAL(gpio, GPIO_LAN1_LED_BIT, !GPIO_LAN1_LED_ON);
146 SETBITVAL(gpio, GPIO_LAN2_LED_BIT, !GPIO_LAN2_LED_ON);
147 #elif defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
148 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, !GPIO_WLAN_LED_ON);
149 #elif defined(CONFIG_FOR_DRAGINO_V2) || defined(CONFIG_FOR_MESH_POTATO_V2)
150 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, !GPIO_WLAN_LED_ON);
151 SETBITVAL(gpio, GPIO_WAN_LED_BIT, !GPIO_WAN_LED_ON);
152 SETBITVAL(gpio, GPIO_LAN_LED_BIT, !GPIO_LAN_LED_ON);
153 SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, !GPIO_INTERNET_LED_ON);
154 #elif defined(CONFIG_FOR_BSB)
155 SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
156 #elif defined(CONFIG_FOR_GL_INET)
157 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, !GPIO_WLAN_LED_ON);
158 SETBITVAL(gpio, GPIO_LAN_LED_BIT, !GPIO_LAN_LED_ON);
160 #error "Custom GPIO in all_led_off() not defined!"
163 ar7240_reg_wr(AR7240_GPIO_OUT, gpio);
167 #ifndef GPIO_RST_BUTTON_BIT
168 #error "GPIO_RST_BUTTON_BIT not defined!"
170 int reset_button_status(void){
173 gpio = ar7240_reg_rd(AR7240_GPIO_IN);
175 if(gpio & (1 << GPIO_RST_BUTTON_BIT)){
176 #if defined(GPIO_RST_BUTTON_IS_ACTIVE_LOW)
182 #if defined(GPIO_RST_BUTTON_IS_ACTIVE_LOW)
190 void gpio_config(void){
191 #if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
193 * clk_obs1(gpio13/bit8), clk_obs2(gpio14/bit9), clk_obs3(gpio15/bit10),
194 * clk_obs4(gpio16/bit11), clk_obs5(gpio17/bit12)
195 * clk_obs0(gpio1/bit19), 6(gpio11/bit20)
197 ar7240_reg_wr(AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & ~((0x1f<<8)|(0x3<<19))));
200 /* Enable eth Switch LEDs */
201 ar7240_reg_wr(AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) | (0x1f<<3)));
204 //Turn on status leds:
206 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) |(1<<0)));
208 //set WLAN LED output to low (reverse polarity LED)
209 //ar7240_reg_wr(AR7240_GPIO_CLEAR, (1<<0));
211 /* Clear AR7240_GPIO_FUNC BIT2 to ensure that software can control LED5(GPIO16) and LED6(GPIO17) */
212 ar7240_reg_wr(AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & ~(0x1<<2)));
215 * clk_obs1(gpio13/bit8), clk_obs2(gpio14/bit9), clk_obs3(gpio15/bit10),
216 * clk_obs4(gpio16/bit11), clk_obs5(gpio17/bit12)
217 * clk_obs0(gpio1/bit19), 6(gpio11/bit20)
220 ar7240_reg_wr(AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & 0xEF84E0FB));
222 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
223 /* Disable EJTAG functionality to enable GPIO functionality */
224 ar7240_reg_wr(AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) | 0x8001));
227 /* Set HORNET_BOOTSTRAP_STATUS BIT18 to ensure that software can control GPIO26 and GPIO27 */
228 ar7240_reg_wr(HORNET_BOOTSTRAP_STATUS, (ar7240_reg_rd(HORNET_BOOTSTRAP_STATUS) | (0x1<<18)));
231 #if defined(CONFIG_FOR_TPLINK_MR3020_V1)
233 /* LED's GPIOs on MR3020:
242 /* set OE, added by zcf, 20110509 */
243 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0xC020001));
245 /* Disable clock obs, added by zcf, 20110509 */
246 //ar7240_reg_wr (AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & 0xffe7e07f));
247 #elif defined(CONFIG_FOR_TPLINK_WR703N_V1) || defined(CONFIG_FOR_TPLINK_WR720N_V3) || defined(CONFIG_FOR_TPLINK_WR710N_V1)
249 /* LED's GPIOs on WR703N/WR720Nv3/WR710N:
255 /* set OE, added by zcf, 20110714 */
256 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0x8000000));
257 #elif defined(CONFIG_FOR_TPLINK_MR3040_V1V2)
259 /* LED's GPIOs on MR3040:
267 /* set OE, added by zcf, 20110509 */
268 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0xC020000));
270 /* Disable clock obs, added by zcf, 20110509 */
271 //ar7240_reg_wr (AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & 0xffe7e07f));
272 #elif defined(CONFIG_FOR_TPLINK_MR10U_V1) || defined(CONFIG_FOR_TPLINK_MR13U_V1)
274 /* LED's GPIOs on MR10U/MR13U:
280 /* set OE, added by zcf, 20110714 */
281 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0x8000000));
282 #elif defined(CONFIG_FOR_TPLINK_WR740N_V4)
284 /* LED's GPIOs on WR740Nv4:
297 /* set OE, added by zcf, 20110509 */
298 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0x803E003));
300 /* Disable clock obs, added by zcf, 20110509 */
301 //ar7240_reg_wr (AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & 0xffe7e07f));
302 #elif defined(CONFIG_FOR_TPLINK_MR3220_V2)
304 /* LED's GPIOs on MR3220v2:
318 /* set OE, added by zcf, 20110509 */
319 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0xC03E003));
321 /* Disable clock obs, added by zcf, 20110509 */
322 //ar7240_reg_wr (AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & 0xffe7e07f));
323 #elif defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
324 // TODO: check GPIO config for C2
325 #elif defined(CONFIG_FOR_DRAGINO_V2) || defined(CONFIG_FOR_MESH_POTATO_V2)
327 /* LED's GPIOs on MR3220v2:
337 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0x10022001));
339 #elif defined(CONFIG_FOR_BSB)
341 /* LED's GPIOs on Black Swift board:
343 * 27 => SYS LED (red) - output
344 * 13-17=> output only (see AR9331 datasheet)
345 * 11 => Reset switch (active low) - in (like all other by default)
350 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0x0803E000));
353 ar7240_reg_wr(AR7240_GPIO_SET, 0x0);
355 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
357 /* LED's GPIOs on DIR-505:
365 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0xC000000));
367 // turn off RED LED, we don't need it
368 ar7240_reg_wr(AR7240_GPIO_OUT, (ar7240_reg_rd(AR7240_GPIO_OUT) | (0x1 << 26)));
369 #elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
371 /* LED's GPIOs on GS-Oolite v1 with development board:
376 * 27 => SYS LED (green on dev board, red on module)
378 * I/O on development board:
379 * 0 => RED LED (active low)
380 * 1 => RED LED (active low)
385 * 14 => RED LED (active low)
386 * 16 => RED LED (active low)
387 * 18 => RED LED (active low)
388 * 19 => RED LED (active low)
389 * 20 => RED LED (active low)
390 * 21 => RED LED (active low)
391 * 22 => RED LED (active low)
394 * 26 => RED LED (active low)
399 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0xDFFE103));
401 // turn on power on USB and turn off RED LEDs
402 ar7240_reg_wr(AR7240_GPIO_SET, 0x47D4103);
403 #elif defined(CONFIG_FOR_GL_INET)
405 /* LED's GPIOs on GL.iNet:
413 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0x2001));
416 #error "Custom GPIO config in gpio_config() not defined!"
420 int ar7240_mem_config(void){
421 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
422 #ifndef COMPRESSED_UBOOT
426 /* Default tap values for starting the tap_init*/
427 ar7240_reg_wr(AR7240_DDR_TAP_CONTROL0, CFG_DDR_TAP0_VAL);
428 ar7240_reg_wr(AR7240_DDR_TAP_CONTROL1, CFG_DDR_TAP1_VAL);
434 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
435 hornet_ddr_tap_init();
438 // return memory size
439 return(ar7240_ddr_find_size());
443 return((long int)ar7240_mem_config());
446 #ifndef COMPRESSED_UBOOT
447 int checkboard(void){
448 printf(BOARD_CUSTOM_STRING"\n\n");
454 * Returns a string with memory type preceded by a space sign
456 const char* print_mem_type(void){
458 * WR720N v3 (CH version) has wrong bootstrap configuration,
459 * so the memory type cannot be recognized automatically
461 #if defined(CONFIG_FOR_TPLINK_WR720N_V3)
462 return " DDR 16-bit";
464 unsigned int reg_val;
466 reg_val = (ar7240_reg_rd(HORNET_BOOTSTRAP_STATUS) & HORNET_BOOTSTRAP_MEM_TYPE_MASK) >> HORNET_BOOTSTRAP_MEM_TYPE_SHIFT;
474 return " DDR 16-bit";
478 return " DDR2 16-bit";
485 #endif /* defined(CONFIG_FOR_TPLINK_WR720N_V3) */