3 #include <asm/mipsregs.h>
4 #include <asm/addrspace.h>
7 #include "ar7240_soc.h"
9 #if !defined(COMPRESSED_UBOOT)
10 extern void hornet_ddr_init(void);
13 extern int ar7240_ddr_find_size(void);
14 extern void hornet_ddr_tap_init(void);
16 #define SETBITVAL(val, pos, bit) do {ulong bitval = (bit) ? 0x1 : 0x0; (val) = ((val) & ~(0x1 << (pos))) | ( (bitval) << (pos));} while(0)
18 void led_toggle(void){
21 gpio = ar7240_reg_rd(AR7240_GPIO_OUT);
23 #if defined(CONFIG_FOR_TPLINK_MR3020_V1)
24 gpio ^= 1 << GPIO_WPS_LED_BIT;
25 #elif defined(CONFIG_FOR_TPLINK_WR703N_V1) || defined(CONFIG_FOR_TPLINK_WR720N_V3) || defined(CONFIG_FOR_TPLINK_WR710N_V1)
26 gpio ^= 1 << GPIO_SYS_LED_BIT;
27 #elif defined(CONFIG_FOR_TPLINK_MR3040_V1V2)
28 gpio ^= 1 << GPIO_INTERNET_LED_BIT;
29 #elif defined(CONFIG_FOR_TPLINK_MR10U_V1) || defined(CONFIG_FOR_TPLINK_MR13U_V1)
30 gpio ^= 1 << GPIO_SYS_LED_BIT;
31 #elif defined(CONFIG_FOR_TPLINK_WR740N_V4) || defined(CONFIG_FOR_TPLINK_MR3220_V2)
32 gpio ^= 1 << GPIO_SYS_LED_BIT;
33 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
34 gpio ^= 1 << GPIO_SYS_LED_BIT;
35 #elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
36 gpio ^= 1 << GPIO_SYS_LED_BIT;
37 #elif defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
38 gpio ^= 1 << GPIO_WLAN_LED_BIT;
39 #elif defined(CONFIG_FOR_DRAGINO_V2)
40 gpio ^= 1 << GPIO_WLAN_LED_BIT;
42 #error "Custom GPIO in leg_toggle() not defined!"
45 ar7240_reg_wr(AR7240_GPIO_OUT, gpio);
48 void all_led_on(void){
51 gpio = ar7240_reg_rd(AR7240_GPIO_OUT);
53 #if defined(CONFIG_FOR_TPLINK_MR3020_V1)
54 SETBITVAL(gpio, GPIO_WPS_LED_BIT, GPIO_WPS_LED_ON);
55 SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, GPIO_INTERNET_LED_ON);
56 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, GPIO_WLAN_LED_ON);
57 SETBITVAL(gpio, GPIO_ETH_LED_BIT, GPIO_ETH_LED_ON);
58 #elif defined(CONFIG_FOR_TPLINK_WR703N_V1) || defined(CONFIG_FOR_TPLINK_WR720N_V3) || defined (CONFIG_FOR_TPLINK_WR710N_V1)
59 SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
60 #elif defined(CONFIG_FOR_TPLINK_MR3040_V1V2)
61 SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, GPIO_INTERNET_LED_ON);
62 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, GPIO_WLAN_LED_ON);
63 SETBITVAL(gpio, GPIO_ETH_LED_BIT, GPIO_ETH_LED_ON);
64 #elif defined(CONFIG_FOR_TPLINK_MR10U_V1) || defined(CONFIG_FOR_TPLINK_MR13U_V1)
65 SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
66 #elif defined(CONFIG_FOR_TPLINK_WR740N_V4) || defined(CONFIG_FOR_TPLINK_MR3220_V2)
67 SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
68 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, GPIO_WLAN_LED_ON);
69 SETBITVAL(gpio, GPIO_LAN1_LED_BIT, GPIO_LAN1_LED_ON);
70 SETBITVAL(gpio, GPIO_LAN2_LED_BIT, GPIO_LAN2_LED_ON);
71 SETBITVAL(gpio, GPIO_LAN3_LED_BIT, GPIO_LAN3_LED_ON);
72 SETBITVAL(gpio, GPIO_LAN4_LED_BIT, GPIO_LAN4_LED_ON);
73 SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, GPIO_INTERNET_LED_ON);
74 SETBITVAL(gpio, GPIO_QSS_LED_BIT, GPIO_QSS_LED_ON);
76 #ifdef CONFIG_FOR_TPLINK_MR3220_V2
77 SETBITVAL(gpio, GPIO_USB_LED_BIT, GPIO_USB_LED_ON);
79 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
80 SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
81 #elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
82 SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
83 SETBITVAL(gpio, GPIO_WAN_LED_BIT, GPIO_WAN_LED_ON);
84 SETBITVAL(gpio, GPIO_LAN1_LED_BIT, GPIO_LAN1_LED_ON);
85 SETBITVAL(gpio, GPIO_LAN2_LED_BIT, GPIO_LAN2_LED_ON);
86 #elif defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
87 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, GPIO_WLAN_LED_ON);
88 #elif defined(CONFIG_FOR_DRAGINO_V2)
89 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, GPIO_WLAN_LED_ON);
90 SETBITVAL(gpio, GPIO_WAN_LED_BIT, GPIO_WAN_LED_ON);
91 SETBITVAL(gpio, GPIO_LAN_LED_BIT, GPIO_LAN_LED_ON);
92 SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, GPIO_INTERNET_LED_ON);
94 #error "Custom GPIO in all_led_on() not defined!"
97 ar7240_reg_wr(AR7240_GPIO_OUT, gpio);
100 void all_led_off(void){
103 gpio = ar7240_reg_rd(AR7240_GPIO_OUT);
105 #if defined(CONFIG_FOR_TPLINK_MR3020_V1)
106 SETBITVAL(gpio, GPIO_WPS_LED_BIT, !GPIO_WPS_LED_ON);
107 SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, !GPIO_INTERNET_LED_ON);
108 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, !GPIO_WLAN_LED_ON);
109 SETBITVAL(gpio, GPIO_ETH_LED_BIT, !GPIO_ETH_LED_ON);
110 #elif defined(CONFIG_FOR_TPLINK_WR703N_V1) || defined(CONFIG_FOR_TPLINK_WR720N_V3) || defined (CONFIG_FOR_TPLINK_WR710N_V1)
111 SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
112 #elif defined(CONFIG_FOR_TPLINK_MR3040_V1V2)
113 SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, !GPIO_INTERNET_LED_ON);
114 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, !GPIO_WLAN_LED_ON);
115 SETBITVAL(gpio, GPIO_ETH_LED_BIT, !GPIO_ETH_LED_ON);
116 #elif defined(CONFIG_FOR_TPLINK_MR10U_V1) || defined(CONFIG_FOR_TPLINK_MR13U_V1)
117 SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
118 #elif defined(CONFIG_FOR_TPLINK_WR740N_V4) || defined(CONFIG_FOR_TPLINK_MR3220_V2)
119 SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
120 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, !GPIO_WLAN_LED_ON);
121 SETBITVAL(gpio, GPIO_LAN1_LED_BIT, !GPIO_LAN1_LED_ON);
122 SETBITVAL(gpio, GPIO_LAN2_LED_BIT, !GPIO_LAN2_LED_ON);
123 SETBITVAL(gpio, GPIO_LAN3_LED_BIT, !GPIO_LAN3_LED_ON);
124 SETBITVAL(gpio, GPIO_LAN4_LED_BIT, !GPIO_LAN4_LED_ON);
125 SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, !GPIO_INTERNET_LED_ON);
126 SETBITVAL(gpio, GPIO_QSS_LED_BIT, !GPIO_QSS_LED_ON);
128 #ifdef CONFIG_FOR_TPLINK_MR3220_V2
129 SETBITVAL(gpio, GPIO_USB_LED_BIT, !GPIO_USB_LED_ON);
131 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
132 SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
133 #elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
134 SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
135 SETBITVAL(gpio, GPIO_WAN_LED_BIT, !GPIO_WAN_LED_ON);
136 SETBITVAL(gpio, GPIO_LAN1_LED_BIT, !GPIO_LAN1_LED_ON);
137 SETBITVAL(gpio, GPIO_LAN2_LED_BIT, !GPIO_LAN2_LED_ON);
138 #elif defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
139 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, !GPIO_WLAN_LED_ON);
140 #elif defined(CONFIG_FOR_DRAGINO_V2)
141 SETBITVAL(gpio, GPIO_WLAN_LED_BIT, !GPIO_WLAN_LED_ON);
142 SETBITVAL(gpio, GPIO_WAN_LED_BIT, !GPIO_WAN_LED_ON);
143 SETBITVAL(gpio, GPIO_LAN_LED_BIT, !GPIO_LAN_LED_ON);
144 SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, !GPIO_INTERNET_LED_ON);
146 #error "Custom GPIO in all_led_off() not defined!"
149 ar7240_reg_wr(AR7240_GPIO_OUT, gpio);
153 #ifndef GPIO_RST_BUTTON_BIT
154 #error "GPIO_RST_BUTTON_BIT not defined!"
156 int reset_button_status(void){
159 gpio = ar7240_reg_rd(AR7240_GPIO_IN);
161 if(gpio & (1 << GPIO_RST_BUTTON_BIT)){
162 #if defined(GPIO_RST_BUTTON_IS_ACTIVE_LOW)
168 #if defined(GPIO_RST_BUTTON_IS_ACTIVE_LOW)
176 void gpio_config(void){
177 #if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
179 * clk_obs1(gpio13/bit8), clk_obs2(gpio14/bit9), clk_obs3(gpio15/bit10),
180 * clk_obs4(gpio16/bit11), clk_obs5(gpio17/bit12)
181 * clk_obs0(gpio1/bit19), 6(gpio11/bit20)
183 ar7240_reg_wr(AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & ~((0x1f<<8)|(0x3<<19))));
186 /* Enable eth Switch LEDs */
187 ar7240_reg_wr(AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) | (0x1f<<3)));
190 //Turn on status leds:
192 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) |(1<<0)));
194 //set WLAN LED output to low (reverse polarity LED)
195 //ar7240_reg_wr(AR7240_GPIO_CLEAR, (1<<0));
197 /* Clear AR7240_GPIO_FUNC BIT2 to ensure that software can control LED5(GPIO16) and LED6(GPIO17) */
198 ar7240_reg_wr(AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & ~(0x1<<2)));
201 * clk_obs1(gpio13/bit8), clk_obs2(gpio14/bit9), clk_obs3(gpio15/bit10),
202 * clk_obs4(gpio16/bit11), clk_obs5(gpio17/bit12)
203 * clk_obs0(gpio1/bit19), 6(gpio11/bit20)
206 ar7240_reg_wr(AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & 0xEF84E0FB));
208 /* Disable EJTAG functionality to enable GPIO functionality */
209 ar7240_reg_wr(AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) | 0x8001));
211 /* Set HORNET_BOOTSTRAP_STATUS BIT18 to ensure that software can control GPIO26 and GPIO27 */
212 ar7240_reg_wr(HORNET_BOOTSTRAP_STATUS, (ar7240_reg_rd(HORNET_BOOTSTRAP_STATUS) | (0x1<<18)));
215 #if defined(CONFIG_FOR_TPLINK_MR3020_V1)
217 /* LED's GPIOs on MR3020:
226 /* set OE, added by zcf, 20110509 */
227 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0xC020001));
229 /* Disable clock obs, added by zcf, 20110509 */
230 //ar7240_reg_wr (AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & 0xffe7e07f));
231 #elif defined(CONFIG_FOR_TPLINK_WR703N_V1) || defined(CONFIG_FOR_TPLINK_WR720N_V3) || defined(CONFIG_FOR_TPLINK_WR710N_V1)
233 /* LED's GPIOs on WR703N/WR720Nv3/WR710N:
239 /* set OE, added by zcf, 20110714 */
240 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0x8000000));
241 #elif defined(CONFIG_FOR_TPLINK_MR3040_V1V2)
243 /* LED's GPIOs on MR3040:
251 /* set OE, added by zcf, 20110509 */
252 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0xC020000));
254 /* Disable clock obs, added by zcf, 20110509 */
255 //ar7240_reg_wr (AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & 0xffe7e07f));
256 #elif defined(CONFIG_FOR_TPLINK_MR10U_V1) || defined(CONFIG_FOR_TPLINK_MR13U_V1)
258 /* LED's GPIOs on MR10U/MR13U:
264 /* set OE, added by zcf, 20110714 */
265 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0x8000000));
266 #elif defined(CONFIG_FOR_TPLINK_WR740N_V4)
268 /* LED's GPIOs on WR740Nv4:
281 /* set OE, added by zcf, 20110509 */
282 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0x803E003));
284 /* Disable clock obs, added by zcf, 20110509 */
285 //ar7240_reg_wr (AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & 0xffe7e07f));
286 #elif defined(CONFIG_FOR_TPLINK_MR3220_V2)
288 /* LED's GPIOs on MR3220v2:
302 /* set OE, added by zcf, 20110509 */
303 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0xC03E003));
305 /* Disable clock obs, added by zcf, 20110509 */
306 //ar7240_reg_wr (AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & 0xffe7e07f));
307 #elif defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
308 // TODO: check GPIO config for C2
309 #elif defined(CONFIG_FOR_DRAGINO_V2)
311 /* LED's GPIOs on MR3220v2:
321 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0x10022001));
323 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
325 /* LED's GPIOs on DIR-505:
333 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0xC000000));
335 // turn off RED LED, we don't need it
336 ar7240_reg_wr(AR7240_GPIO_OUT, (ar7240_reg_rd(AR7240_GPIO_OUT) | (0x1 << 26)));
337 #elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
339 /* LED's GPIOs on GS-Oolite v1 with development board:
344 * 27 => SYS LED (green on dev board, red on module)
346 * I/O on development board:
347 * 0 => RED LED (active low)
348 * 1 => RED LED (active low)
353 * 14 => RED LED (active low)
354 * 16 => RED LED (active low)
355 * 18 => RED LED (active low)
356 * 19 => RED LED (active low)
357 * 20 => RED LED (active low)
358 * 21 => RED LED (active low)
359 * 22 => RED LED (active low)
362 * 26 => RED LED (active low)
367 ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0xDFFE103));
369 // turn on power on USB and turn off RED LEDs
370 ar7240_reg_wr(AR7240_GPIO_SET, 0x47D4103);
372 #error "Custom GPIO config in gpio_config() not defined!"
376 int ar7240_mem_config(void){
377 #ifndef COMPRESSED_UBOOT
381 /* Default tap values for starting the tap_init*/
382 ar7240_reg_wr(AR7240_DDR_TAP_CONTROL0, CFG_DDR_TAP0_VAL);
383 ar7240_reg_wr(AR7240_DDR_TAP_CONTROL1, CFG_DDR_TAP1_VAL);
388 hornet_ddr_tap_init();
390 // return memory size
391 return(ar7240_ddr_find_size());
395 return((long int)ar7240_mem_config());
398 #ifndef COMPRESSED_UBOOT
399 int checkboard(void){
400 printf(BOARD_CUSTOM_STRING"\n\n");
406 * Returns a string with memory type preceded by a space sign
408 const char* print_mem_type(void){
410 * WR720N v3 (CH version) has wrong bootstrap configuration,
411 * so the memory type cannot be recognized automatically
413 #if defined(CONFIG_FOR_TPLINK_WR720N_V3)
414 return " DDR 16-bit";
416 unsigned int reg_val;
418 reg_val = (ar7240_reg_rd(HORNET_BOOTSTRAP_STATUS) & HORNET_BOOTSTRAP_MEM_TYPE_MASK) >> HORNET_BOOTSTRAP_MEM_TYPE_SHIFT;
426 return " DDR 16-bit";
430 return " DDR2 16-bit";
437 #endif /* defined(CONFIG_FOR_TPLINK_WR720N_V3) */