fsl_esdhc: Update clock enable bits for USDHC
[oweals/u-boot.git] / tools / imximage.h
1 /*
2  * (C) Copyright 2009
3  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  */
7
8 #ifndef _IMXIMAGE_H_
9 #define _IMXIMAGE_H_
10
11 #define MAX_HW_CFG_SIZE_V2 220 /* Max number of registers imx can set for v2 */
12 #define MAX_HW_CFG_SIZE_V1 60  /* Max number of registers imx can set for v1 */
13 #define APP_CODE_BARKER 0xB1
14 #define DCD_BARKER      0xB17219E9
15
16 /*
17  * NOTE: This file must be kept in sync with arch/arm/include/asm/\
18  *       imx-common/imximage.cfg because tools/imximage.c can not
19  *       cross-include headers from arch/arm/ and vice-versa.
20  */
21 #define CMD_DATA_STR    "DATA"
22
23 /* Initial Vector Table Offset */
24 #define FLASH_OFFSET_UNDEFINED  0xFFFFFFFF
25 #define FLASH_OFFSET_STANDARD   0x400
26 #define FLASH_OFFSET_NAND       FLASH_OFFSET_STANDARD
27 #define FLASH_OFFSET_SD         FLASH_OFFSET_STANDARD
28 #define FLASH_OFFSET_SPI        FLASH_OFFSET_STANDARD
29 #define FLASH_OFFSET_ONENAND    0x100
30 #define FLASH_OFFSET_NOR        0x1000
31 #define FLASH_OFFSET_SATA       FLASH_OFFSET_STANDARD
32 #define FLASH_OFFSET_QSPI       0x1000
33
34 /* Initial Load Region Size */
35 #define FLASH_LOADSIZE_UNDEFINED        0xFFFFFFFF
36 #define FLASH_LOADSIZE_STANDARD         0x1000
37 #define FLASH_LOADSIZE_NAND             FLASH_LOADSIZE_STANDARD
38 #define FLASH_LOADSIZE_SD               FLASH_LOADSIZE_STANDARD
39 #define FLASH_LOADSIZE_SPI              FLASH_LOADSIZE_STANDARD
40 #define FLASH_LOADSIZE_ONENAND          0x400
41 #define FLASH_LOADSIZE_NOR              0x0 /* entire image */
42 #define FLASH_LOADSIZE_SATA             FLASH_LOADSIZE_STANDARD
43 #define FLASH_LOADSIZE_QSPI             0x0 /* entire image */
44
45 /* Command tags and parameters */
46 #define IVT_HEADER_TAG                  0xD1
47 #define IVT_VERSION                     0x40
48 #define DCD_HEADER_TAG                  0xD2
49 #define DCD_VERSION                     0x40
50 #define DCD_WRITE_DATA_COMMAND_TAG      0xCC
51 #define DCD_WRITE_DATA_PARAM            0x4
52 #define DCD_WRITE_CLR_BIT_PARAM 0xC
53 #define DCD_CHECK_DATA_COMMAND_TAG      0xCF
54 #define DCD_CHECK_BITS_SET_PARAM        0x14
55 #define DCD_CHECK_BITS_CLR_PARAM        0x04
56
57 enum imximage_cmd {
58         CMD_INVALID,
59         CMD_IMAGE_VERSION,
60         CMD_BOOT_FROM,
61         CMD_BOOT_OFFSET,
62         CMD_WRITE_DATA,
63         CMD_WRITE_CLR_BIT,
64         CMD_CHECK_BITS_SET,
65         CMD_CHECK_BITS_CLR,
66         CMD_CSF,
67 };
68
69 enum imximage_fld_types {
70         CFG_INVALID = -1,
71         CFG_COMMAND,
72         CFG_REG_SIZE,
73         CFG_REG_ADDRESS,
74         CFG_REG_VALUE
75 };
76
77 enum imximage_version {
78         IMXIMAGE_VER_INVALID = -1,
79         IMXIMAGE_V1 = 1,
80         IMXIMAGE_V2
81 };
82
83 typedef struct {
84         uint32_t type; /* Type of pointer (byte, halfword, word, wait/read) */
85         uint32_t addr; /* Address to write to */
86         uint32_t value; /* Data to write */
87 } dcd_type_addr_data_t;
88
89 typedef struct {
90         uint32_t barker; /* Barker for sanity check */
91         uint32_t length; /* Device configuration length (without preamble) */
92 } dcd_preamble_t;
93
94 typedef struct {
95         dcd_preamble_t preamble;
96         dcd_type_addr_data_t addr_data[MAX_HW_CFG_SIZE_V1];
97 } dcd_v1_t;
98
99 typedef struct {
100         uint32_t app_code_jump_vector;
101         uint32_t app_code_barker;
102         uint32_t app_code_csf;
103         uint32_t dcd_ptr_ptr;
104         uint32_t super_root_key;
105         uint32_t dcd_ptr;
106         uint32_t app_dest_ptr;
107 } flash_header_v1_t;
108
109 typedef struct {
110         uint32_t length;        /* Length of data to be read from flash */
111 } flash_cfg_parms_t;
112
113 typedef struct {
114         flash_header_v1_t fhdr;
115         dcd_v1_t dcd_table;
116         flash_cfg_parms_t ext_header;
117 } imx_header_v1_t;
118
119 typedef struct {
120         uint32_t addr;
121         uint32_t value;
122 } dcd_addr_data_t;
123
124 typedef struct {
125         uint8_t tag;
126         uint16_t length;
127         uint8_t version;
128 } __attribute__((packed)) ivt_header_t;
129
130 typedef struct {
131         uint8_t tag;
132         uint16_t length;
133         uint8_t param;
134 } __attribute__((packed)) write_dcd_command_t;
135
136 struct dcd_v2_cmd {
137         write_dcd_command_t write_dcd_command;
138         dcd_addr_data_t addr_data[MAX_HW_CFG_SIZE_V2];
139 };
140
141 typedef struct {
142         ivt_header_t header;
143         struct dcd_v2_cmd dcd_cmd;
144         uint32_t padding[1]; /* end up on an 8-byte boundary */
145 } dcd_v2_t;
146
147 typedef struct {
148         uint32_t start;
149         uint32_t size;
150         uint32_t plugin;
151 } boot_data_t;
152
153 typedef struct {
154         ivt_header_t header;
155         uint32_t entry;
156         uint32_t reserved1;
157         uint32_t dcd_ptr;
158         uint32_t boot_data_ptr;
159         uint32_t self;
160         uint32_t csf;
161         uint32_t reserved2;
162 } flash_header_v2_t;
163
164 typedef struct {
165         flash_header_v2_t fhdr;
166         boot_data_t boot_data;
167         dcd_v2_t dcd_table;
168 } imx_header_v2_t;
169
170 /* The header must be aligned to 4k on MX53 for NAND boot */
171 struct imx_header {
172         union {
173                 imx_header_v1_t hdr_v1;
174                 imx_header_v2_t hdr_v2;
175         } header;
176 };
177
178 typedef void (*set_dcd_val_t)(struct imx_header *imxhdr,
179                                         char *name, int lineno,
180                                         int fld, uint32_t value,
181                                         uint32_t off);
182
183 typedef void (*set_dcd_param_t)(struct imx_header *imxhdr, uint32_t dcd_len,
184                                         int32_t cmd);
185
186 typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr,
187                                         uint32_t dcd_len,
188                                         char *name, int lineno);
189
190 typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len,
191                 uint32_t entry_point, uint32_t flash_offset);
192
193 #endif /* _IMXIMAGE_H_ */