2 * Copyright (C) 2016 Socionext Inc.
3 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * SPDX-License-Identifier: GPL-2.0+
8 #include <linux/bitops.h>
10 #include <linux/sizes.h>
12 #define CNT_CONTROL_BASE 0x60E00000
15 #define CNTCR_EN BIT(0)
17 /* setup ARMv8 Generic Timer */
23 base = ioremap(CNT_CONTROL_BASE, SZ_4K);
27 * In a system that implements both Secure and Non-secure states,
28 * this register is only writable in Secure state.
30 tmp = readl(base + CNTCR);
32 writel(tmp, base + CNTCR);