target/linux/sunxi/patches-4.14/031-arm64-Implement-arch_counter_get_cntpct-to-read-the-.patch

   1 From f2e600c149fda3453344f89c7e9353fe278ebd32 Mon Sep 17 00:00:00 2001
   2 From: Christoffer Dall <christoffer.dall@linaro.org>
   3 Date: Wed, 18 Oct 2017 13:06:25 +0200
   4 Subject: [PATCH] arm64: Implement arch_counter_get_cntpct to read the physical
   5  counter
   6
   7 As we are about to use the physical counter on arm64 systems that have
   8 KVM support, implement arch_counter_get_cntpct() and the associated
   9 errata workaround functionality for stable timer reads.
  10
  11 Cc: Will Deacon <will.deacon@arm.com>
  12 Cc: Mark Rutland <mark.rutland@arm.com>
  13 Acked-by: Catalin Marinas <catalin.marinas@arm.com>
  14 Acked-by: Marc Zyngier <marc.zyngier@arm.com>
  15 Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
  16 ---
  17  arch/arm64/include/asm/arch_timer.h  |  8 +++-----
  18  drivers/clocksource/arm_arch_timer.c | 23 +++++++++++++++++++++++
  19  2 files changed, 26 insertions(+), 5 deletions(-)
  20
  21 --- a/arch/arm64/include/asm/arch_timer.h
  22 +++ b/arch/arm64/include/asm/arch_timer.h
  23 @@ -52,6 +52,7 @@ struct arch_timer_erratum_workaround {
  24         const char *desc;
  25         u32 (*read_cntp_tval_el0)(void);
  26         u32 (*read_cntv_tval_el0)(void);
  27 +       u64 (*read_cntpct_el0)(void);
  28         u64 (*read_cntvct_el0)(void);
  29         int (*set_next_event_phys)(unsigned long, struct clock_event_device *);
  30         int (*set_next_event_virt)(unsigned long, struct clock_event_device *);
  31 @@ -148,11 +149,8 @@ static inline void arch_timer_set_cntkct
  32
  33  static inline u64 arch_counter_get_cntpct(void)
  34  {
  35 -       /*
  36 -        * AArch64 kernel and user space mandate the use of CNTVCT.
  37 -        */
  38 -       BUG();
  39 -       return 0;
  40 +       isb();
  41 +       return arch_timer_reg_read_stable(cntpct_el0);
  42  }
  43
  44  static inline u64 arch_counter_get_cntvct(void)
  45 --- a/drivers/clocksource/arm_arch_timer.c
  46 +++ b/drivers/clocksource/arm_arch_timer.c
  47 @@ -217,6 +217,11 @@ static u32 notrace fsl_a008585_read_cntv
  48         return __fsl_a008585_read_reg(cntv_tval_el0);
  49  }
  50
  51 +static u64 notrace fsl_a008585_read_cntpct_el0(void)
  52 +{
  53 +       return __fsl_a008585_read_reg(cntpct_el0);
  54 +}
  55 +
  56  static u64 notrace fsl_a008585_read_cntvct_el0(void)
  57  {
  58         return __fsl_a008585_read_reg(cntvct_el0);
  59 @@ -258,6 +263,11 @@ static u32 notrace hisi_161010101_read_c
  60         return __hisi_161010101_read_reg(cntv_tval_el0);
  61  }
  62
  63 +static u64 notrace hisi_161010101_read_cntpct_el0(void)
  64 +{
  65 +       return __hisi_161010101_read_reg(cntpct_el0);
  66 +}
  67 +
  68  static u64 notrace hisi_161010101_read_cntvct_el0(void)
  69  {
  70         return __hisi_161010101_read_reg(cntvct_el0);
  71 @@ -288,6 +298,15 @@ static struct ate_acpi_oem_info hisi_161
  72  #endif
  73
  74  #ifdef CONFIG_ARM64_ERRATUM_858921
  75 +static u64 notrace arm64_858921_read_cntpct_el0(void)
  76 +{
  77 +       u64 old, new;
  78 +
  79 +       old = read_sysreg(cntpct_el0);
  80 +       new = read_sysreg(cntpct_el0);
  81 +       return (((old ^ new) >> 32) & 1) ? old : new;
  82 +}
  83 +
  84  static u64 notrace arm64_858921_read_cntvct_el0(void)
  85  {
  86         u64 old, new;
  87 @@ -346,6 +365,7 @@ static const struct arch_timer_erratum_w
  88                 .desc = "Freescale erratum a005858",
  89                 .read_cntp_tval_el0 = fsl_a008585_read_cntp_tval_el0,
  90                 .read_cntv_tval_el0 = fsl_a008585_read_cntv_tval_el0,
  91 +               .read_cntpct_el0 = fsl_a008585_read_cntpct_el0,
  92                 .read_cntvct_el0 = fsl_a008585_read_cntvct_el0,
  93                 .set_next_event_phys = erratum_set_next_event_tval_phys,
  94                 .set_next_event_virt = erratum_set_next_event_tval_virt,
  95 @@ -358,6 +378,7 @@ static const struct arch_timer_erratum_w
  96                 .desc = "HiSilicon erratum 161010101",
  97                 .read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
  98                 .read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
  99 +               .read_cntpct_el0 = hisi_161010101_read_cntpct_el0,
 100                 .read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
 101                 .set_next_event_phys = erratum_set_next_event_tval_phys,
 102                 .set_next_event_virt = erratum_set_next_event_tval_virt,
 103 @@ -368,6 +389,7 @@ static const struct arch_timer_erratum_w
 104                 .desc = "HiSilicon erratum 161010101",
 105                 .read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
 106                 .read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
 107 +               .read_cntpct_el0 = hisi_161010101_read_cntpct_el0,
 108                 .read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
 109                 .set_next_event_phys = erratum_set_next_event_tval_phys,
 110                 .set_next_event_virt = erratum_set_next_event_tval_virt,
 111 @@ -378,6 +400,7 @@ static const struct arch_timer_erratum_w
 112                 .match_type = ate_match_local_cap_id,
 113                 .id = (void *)ARM64_WORKAROUND_858921,
 114                 .desc = "ARM erratum 858921",
 115 +               .read_cntpct_el0 = arm64_858921_read_cntpct_el0,
 116                 .read_cntvct_el0 = arm64_858921_read_cntvct_el0,
 117         },
 118  #endif