1 From e5b4d58432bec91414e82069a402d61e6aed631e Mon Sep 17 00:00:00 2001
2 From: Oliver Schinagl <oliver@schinagl.nl>
3 Date: Tue, 3 Dec 2013 12:10:11 +0100
4 Subject: [PATCH] ARM: sunxi: dts: Add ahci support to a few A10 and A20 boards
6 This patch adds sunxi sata support to A10 and A20 boards that have such
7 a connector. Some boards also feature a regulator via a GPIO and support
8 for this is also added.
10 Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
12 arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 27 +++++++++++++++++++++++++
13 arch/arm/boot/dts/sun4i-a10.dtsi | 9 +++++++++
14 arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 27 +++++++++++++++++++++++++
15 arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 27 +++++++++++++++++++++++++
16 arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 26 ++++++++++++++++++++++++
17 arch/arm/boot/dts/sun7i-a20.dtsi | 9 +++++++++
18 6 files changed, 125 insertions(+)
20 diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
21 index d193937..63bd00d 100644
22 --- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
23 +++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
28 + sata: ahci@01c18000 {
29 + pwr-supply = <®_ahci_5v>;
34 + ahci_pwr_pin: ahci_pwr_pin@0 {
35 + allwinner,pins = "PB8";
36 + allwinner,function = "gpio_out";
37 + allwinner,drive = <0>;
38 + allwinner,pull = <0>;
41 mmc0_cd_pin_cubieboard: mmc0_cd_pin@0 {
42 allwinner,pins = "PH1";
43 allwinner,function = "gpio_in";
45 linux,default-trigger = "heartbeat";
50 + compatible = "simple-bus";
51 + pinctrl-names = "default";
53 + reg_ahci_5v: ahci-5v {
54 + compatible = "regulator-fixed";
55 + regulator-name = "ahci-5v";
56 + regulator-min-microvolt = <5000000>;
57 + regulator-max-microvolt = <5000000>;
58 + pinctrl-0 = <&ahci_pwr_pin>;
59 + gpio = <&pio 1 8 0>;
64 diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
65 index 13bccd5..a6dafec 100644
66 --- a/arch/arm/boot/dts/sun4i-a10.dtsi
67 +++ b/arch/arm/boot/dts/sun4i-a10.dtsi
72 + sata: ahci@01c18000 {
73 + compatible = "allwinner,sun4i-a10-ahci";
74 + reg = <0x01c18000 0x1000>;
76 + clocks = <&ahb_gates 25>, <&pll6 0>;
77 + clock-names = "ahb_sata", "pll6_sata";
78 + status = "disabled";
81 intc: interrupt-controller@01c20400 {
82 compatible = "allwinner,sun4i-ic";
83 reg = <0x01c20400 0x400>;
84 diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
85 index ea55563..1d810bb 100644
86 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
87 +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
92 + sata: ahci@01c18000 {
93 + pwr-supply = <®_ahci_5v>;
98 + ahci_pwr_pin: ahci_pwr_pin@0 {
99 + allwinner,pins = "PB8";
100 + allwinner,function = "gpio_out";
101 + allwinner,drive = <0>;
102 + allwinner,pull = <0>;
105 mmc0_cd_pin_cubieboard2: mmc0_cd_pin@0 {
106 allwinner,pins = "PH1";
107 allwinner,function = "gpio_in";
109 gpios = <&pio 7 20 0>;
114 + compatible = "simple-bus";
115 + pinctrl-names = "default";
117 + reg_ahci_5v: ahci-5v {
118 + compatible = "regulator-fixed";
119 + regulator-name = "ahci-5v";
120 + regulator-min-microvolt = <5000000>;
121 + regulator-max-microvolt = <5000000>;
122 + pinctrl-0 = <&ahci_pwr_pin>;
123 + gpio = <&pio 1 8 0>;
124 + enable-active-high;
128 diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
129 index bc04cc7..5e9f2ab 100644
130 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
131 +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
136 + sata: ahci@01c18000 {
137 + pwr-supply = <®_ahci_5v>;
142 + ahci_pwr_pin: ahci_pwr_pin@0 {
143 + allwinner,pins = "PB8";
144 + allwinner,function = "gpio_out";
145 + allwinner,drive = <0>;
146 + allwinner,pull = <0>;
149 mmc0_cd_pin_olinuxinom: mmc0_cd_pin@0 {
150 allwinner,pins = "PH1";
151 allwinner,function = "gpio_in";
153 default-state = "on";
158 + compatible = "simple-bus";
160 + reg_ahci_5v: ahci-5v {
161 + compatible = "regulator-fixed";
162 + regulator-name = "ahci-5v";
163 + regulator-min-microvolt = <5000000>;
164 + regulator-max-microvolt = <5000000>;
165 + pinctrl-0 = <&ahci_pwr_pin>;
166 + gpio = <&pio 1 8 0>;
167 + enable-active-high;
171 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
172 index 7ebfc89..f161590 100644
173 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
174 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
179 + sata: ahci@01c18000 {
180 + compatible = "allwinner,sun4i-a10-ahci";
181 + reg = <0x01c18000 0x1000>;
182 + interrupts = <0 56 1>;
183 + clocks = <&ahb_gates 25>, <&pll6 0>;
184 + clock-names = "ahb_sata", "pll6_sata";
185 + status = "disabled";
189 compatible = "allwinner,sun4i-timer";
190 reg = <0x01c20c00 0x90>;