target/linux/s3c24xx/patches-2.6.24/1313-S3C24xx-NAND-allow-for-faster-timings.patch

   1 From 54524f4531c8b262431b794fea610d81bb351c86 Mon Sep 17 00:00:00 2001
   2 From: Harald Welte <laforge@openmoko.org>
   3 Date: Tue, 21 Oct 2008 08:17:07 +0100
   4 Subject: [PATCH] S3C24xx NAND: allow for faster timings
   5
   6 Tacls can actually be zero with some NAND flash devices, so we need
   7 to permit this.
   8
   9 Also, the TACLS register actually specifies the actual number of
  10 HCLK clocks, where the TWRPH0 and TWRPH1 registers are auto-incremented
  11 by one HCLK clock in hardware.
  12
  13 Signed-off-by: Harald Welte <laforge@openmoko.org>
  14 ---
  15  drivers/mtd/nand/s3c2410.c |   13 +++++++------
  16  1 files changed, 7 insertions(+), 6 deletions(-)
  17
  18 diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
  19 index 4413d76..eeb48ed 100644
  20 --- a/drivers/mtd/nand/s3c2410.c
  21 +++ b/drivers/mtd/nand/s3c2410.c
  22 @@ -158,6 +158,10 @@ static int s3c_nand_calc_rate(int wanted, unsigned long clk, int max)
  23  {
  24         int result;
  25
  26 +       /* Tacls can be 0ns in some cases */
  27 +       if (wanted == 0)
  28 +               return 0;
  29 +
  30         result = (wanted * clk) / NS_IN_KHZ;
  31         result++;
  32
  33 @@ -168,9 +172,6 @@ static int s3c_nand_calc_rate(int wanted, unsigned long clk, int max)
  34                 return -1;
  35         }
  36
  37 -       if (result < 1)
  38 -               result = 1;
  39 -
  40         return result;
  41  }
  42
  43 @@ -202,7 +203,7 @@ static int s3c2410_nand_inithw(struct s3c2410_nand_info *info,
  44                 twrph1 = 8;
  45         }
  46
  47 -       if (tacls < 0 || twrph0 < 0 || twrph1 < 0) {
  48 +       if (tacls < 0 || twrph0 < 1 || twrph1 < 1) {
  49                 dev_err(info->device, "cannot get suitable timings\n");
  50                 return -EINVAL;
  51         }
  52 @@ -213,14 +214,14 @@ static int s3c2410_nand_inithw(struct s3c2410_nand_info *info,
  53         switch (info->cpu_type) {
  54         case TYPE_S3C2410:
  55                 cfg = S3C2410_NFCONF_EN;
  56 -               cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
  57 +               cfg |= S3C2410_NFCONF_TACLS(tacls);
  58                 cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
  59                 cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);
  60                 break;
  61
  62         case TYPE_S3C2440:
  63         case TYPE_S3C2412:
  64 -               cfg = S3C2440_NFCONF_TACLS(tacls - 1);
  65 +               cfg = S3C2440_NFCONF_TACLS(tacls);
  66                 cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1);
  67                 cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1);
  68
  69 --
  70 1.5.6.5
  71