2 * linux/drivers/mmc/host/glamo-mmc.c - Glamo MMC driver
4 * Copyright (C) 2007 Openmoko, Inc, Andy Green <andy@openmoko.com>
5 * Based on S3C MMC driver that was:
6 * Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel <tk@maintech.de>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/clk.h>
16 #include <linux/mmc/mmc.h>
17 #include <linux/mmc/sd.h>
18 #include <linux/mmc/host.h>
19 #include <linux/platform_device.h>
20 #include <linux/irq.h>
21 #include <linux/delay.h>
22 #include <linux/interrupt.h>
23 #include <linux/spinlock.h>
24 #include <linux/workqueue.h>
25 #include <linux/crc7.h>
28 #include <asm/dma-mapping.h>
31 #include "glamo-mci.h"
32 #include "glamo-core.h"
33 #include "glamo-regs.h"
35 #define DRIVER_NAME "glamo-mci"
37 static void glamo_mci_send_request(struct mmc_host *mmc);
38 static void glamo_mci_send_command(struct glamo_mci_host *host,
39 struct mmc_command *cmd);
44 * held at /(3 + 1) due to concerns of 100R recommended series resistor
45 * allows 16MHz @ 4-bit --> 8MBytes/sec raw
47 * you can override this on kernel commandline using
49 * glamo_mci.sd_max_clk=10000000
54 static int sd_max_clk = 50000000 / 3;
55 module_param(sd_max_clk, int, 0644);
60 * you can override this on kernel commandline using
62 * glamo_mci.sd_slow_ratio=8
66 * platform callback is used to decide effective clock rate, if not
67 * defined then max is used, if defined and returns nonzero, rate is
68 * divided by this factor
71 static int sd_slow_ratio = 8;
72 module_param(sd_slow_ratio, int, 0644);
75 * Post-power SD clock rate
77 * you can override this on kernel commandline using
79 * glamo_mci.sd_post_power_clock=1000000
83 * After changing power to card, clock is held at this rate until first bulk
87 static int sd_post_power_clock = 1000000;
88 module_param(sd_post_power_clock, int, 0644);
92 * SD Signal drive strength
94 * you can override this on kernel commandline using
96 * glamo_mci.sd_drive=0
102 module_param(sd_drive, int, 0644);
105 * SD allow SD clock to run while idle
107 * you can override this on kernel commandline using
109 * glamo_mci.sd_idleclk=0
114 static int sd_idleclk = 0; /* disallow idle clock by default */
115 module_param(sd_idleclk, int, 0644);
117 /* used to stash real idleclk state in suspend: we force it to run in there */
118 static int suspend_sd_idleclk;
120 static inline void glamo_reg_write(struct glamo_mci_host *glamo,
121 u_int16_t reg, u_int16_t val)
123 writew(val, glamo->mmio_base + reg);
126 static inline u_int16_t glamo_reg_read(struct glamo_mci_host *glamo,
129 return readw(glamo->mmio_base + reg);
132 static void glamo_reg_set_bit_mask(struct glamo_mci_host *glamo,
133 u_int16_t reg, u_int16_t mask,
140 tmp = glamo_reg_read(glamo, reg);
143 glamo_reg_write(glamo, reg, tmp);
146 static void do_pio_read(struct glamo_mci_host *host)
148 struct scatterlist *sg;
149 u16 __iomem *from_ptr = host->data_base;
150 struct mmc_data *data = host->mrq->data;
153 dev_dbg(&host->pdev->dev, "pio_read():\n");
154 for (sg = data->sg; sg; sg = sg_next(sg)) {
155 sg_pointer = page_address(sg_page(sg)) + sg->offset;
158 memcpy(sg_pointer, from_ptr, sg->length);
159 from_ptr += sg->length >> 1;
161 data->bytes_xfered += sg->length;
164 dev_dbg(&host->pdev->dev, "pio_read(): "
165 "complete (no more data).\n");
168 static void do_pio_write(struct glamo_mci_host *host)
170 struct scatterlist *sg;
171 u16 __iomem *to_ptr = host->data_base;
172 struct mmc_data *data = host->mrq->data;
175 dev_dbg(&host->pdev->dev, "pio_write():\n");
176 for (sg = data->sg; sg; sg = sg_next(sg)) {
177 sg_pointer = page_address(sg_page(sg)) + sg->offset;
179 data->bytes_xfered += sg->length;
181 memcpy(to_ptr, sg_pointer, sg->length);
182 to_ptr += sg->length >> 1;
185 dev_dbg(&host->pdev->dev, "pio_write(): complete\n");
188 static void glamo_mci_fix_card_div(struct glamo_mci_host *host, int div)
192 spin_lock_irqsave(&host->pdata->pglamo->lock, flags);
195 /* stop clock - remove clock from divider input */
196 writew(readw(host->pdata->pglamo->base +
197 GLAMO_REG_CLOCK_GEN5_1) & (~GLAMO_CLOCK_GEN51_EN_DIV_TCLK),
198 host->pdata->pglamo->base + GLAMO_REG_CLOCK_GEN5_1);
201 if (host->force_slow_during_powerup)
202 div = host->clk_rate / sd_post_power_clock;
203 else if (host->pdata->glamo_mci_use_slow &&
204 host->pdata->glamo_mci_use_slow())
205 div = div * sd_slow_ratio;
210 * set the nearest prescaler factor
212 * register shared with SCLK divisor -- no chance of race because
213 * we don't use sensor interface
215 writew((readw(host->pdata->pglamo->base +
216 GLAMO_REG_CLOCK_GEN8) & 0xff00) | div,
217 host->pdata->pglamo->base + GLAMO_REG_CLOCK_GEN8);
218 /* enable clock to divider input */
219 writew(readw(host->pdata->pglamo->base +
220 GLAMO_REG_CLOCK_GEN5_1) | GLAMO_CLOCK_GEN51_EN_DIV_TCLK,
221 host->pdata->pglamo->base + GLAMO_REG_CLOCK_GEN5_1);
223 spin_unlock_irqrestore(&host->pdata->pglamo->lock, flags);
227 static int glamo_mci_set_card_clock(struct glamo_mci_host *host, int freq)
234 for (div = 0; div < 255; div++) {
235 real_rate = host->clk_rate / (div + 1);
236 if (real_rate <= freq)
241 glamo_mci_fix_card_div(host, div);
244 host->clk_div = 0xff;
246 if (!sd_idleclk && !host->force_slow_during_powerup)
248 glamo_mci_fix_card_div(host, -1);
250 host->real_rate = real_rate;
255 static void glamo_mci_irq_worker(struct work_struct *work)
257 struct glamo_mci_host *host =
258 container_of(work, struct glamo_mci_host, irq_work);
259 struct mmc_command *cmd = host->mrq->cmd;
261 if (cmd->data->flags & MMC_DATA_READ) {
265 /* issue STOP if we have been given one to use */
266 if (host->mrq->stop) {
267 glamo_mci_send_command(host, host->mrq->stop);
270 if (!sd_idleclk && !host->force_slow_during_powerup)
272 glamo_mci_fix_card_div(host, -1);
275 mmc_request_done(host->mmc, cmd->mrq);
278 static irqreturn_t glamo_mci_irq(int irq, void *devid)
280 struct glamo_mci_host *host = (struct glamo_mci_host*)devid;
282 struct mmc_command *cmd;
285 if (host->suspending) { /* bad news, dangerous time */
286 dev_err(&host->pdev->dev, "****glamo_mci_irq before resumed\n");
292 cmd = host->mrq->cmd;
296 spin_lock_irqsave(&host->lock, flags);
298 status = readw(host->mmio_base + GLAMO_REG_MMC_RB_STAT1);
299 dev_dbg(&host->pdev->dev, "status = 0x%04x\n", status);
301 /* we ignore a data timeout report if we are also told the data came */
302 if (status & GLAMO_STAT1_MMC_RB_DRDY)
303 status &= ~GLAMO_STAT1_MMC_DTOUT;
305 if (status & (GLAMO_STAT1_MMC_RTOUT |
306 GLAMO_STAT1_MMC_DTOUT))
307 cmd->error = -ETIMEDOUT;
308 if (status & (GLAMO_STAT1_MMC_BWERR |
309 GLAMO_STAT1_MMC_BRERR))
310 cmd->error = -EILSEQ;
312 dev_info(&host->pdev->dev, "Error after cmd: 0x%x\n", status);
317 * disable the initial slow start after first bulk transfer
319 if (host->force_slow_during_powerup)
320 host->force_slow_during_powerup--;
323 * we perform the memcpy out of Glamo memory outside of IRQ context
324 * so we don't block other interrupts
326 schedule_work(&host->irq_work);
332 mmc_request_done(host->mmc, cmd->mrq);
334 spin_unlock_irqrestore(&host->lock, flags);
339 static void glamo_mci_send_command(struct glamo_mci_host *host,
340 struct mmc_command *cmd)
344 unsigned int timeout = 1000000;
345 u16 * reg_resp = (u16 *)(host->mmio_base + GLAMO_REG_MMC_CMD_RSP1);
348 /* if we can't do it, reject as busy */
349 if (!readw(host->mmio_base + GLAMO_REG_MMC_RB_STAT1) &
350 GLAMO_STAT1_MMC_IDLE) {
353 mmc_request_done(host->mmc, host->mrq);
357 /* create an array in wire order for CRC computation */
358 u8a[0] = 0x40 | (cmd->opcode & 0x3f);
359 u8a[1] = (u8)(cmd->arg >> 24);
360 u8a[2] = (u8)(cmd->arg >> 16);
361 u8a[3] = (u8)(cmd->arg >> 8);
362 u8a[4] = (u8)cmd->arg;
363 u8a[5] = (crc7(0, u8a, 5) << 1) | 0x01; /* crc7 on first 5 bytes of packet */
365 /* issue the wire-order array including CRC in register order */
366 writew((u8a[4] << 8) | u8a[5], host->mmio_base + GLAMO_REG_MMC_CMD_REG1);
367 writew((u8a[2] << 8) | u8a[3], host->mmio_base + GLAMO_REG_MMC_CMD_REG2);
368 writew((u8a[0] << 8) | u8a[1], host->mmio_base + GLAMO_REG_MMC_CMD_REG3);
370 /* command index toggle */
371 fire |= (host->request_counter & 1) << 12;
373 /* set type of command */
374 switch (mmc_cmd_type(cmd)) {
376 fire |= GLAMO_FIRE_MMC_CMDT_BNR;
379 fire |= GLAMO_FIRE_MMC_CMDT_BR;
382 fire |= GLAMO_FIRE_MMC_CMDT_AND;
385 fire |= GLAMO_FIRE_MMC_CMDT_AD;
389 * if it expects a response, set the type expected
391 * R1, Length : 48bit, Normal response
392 * R1b, Length : 48bit, same R1, but added card busy status
393 * R2, Length : 136bit (really 128 bits with CRC snipped)
394 * R3, Length : 48bit (OCR register value)
395 * R4, Length : 48bit, SDIO_OP_CONDITION, Reverse SDIO Card
396 * R5, Length : 48bit, IO_RW_DIRECTION, Reverse SDIO Card
397 * R6, Length : 48bit (RCA register)
398 * R7, Length : 48bit (interface condition, VHS(voltage supplied),
399 * check pattern, CRC7)
401 switch (mmc_resp_type(cmd)) {
402 case MMC_RSP_R1: /* same index as R6 and R7 */
403 fire |= GLAMO_FIRE_MMC_RSPT_R1;
406 fire |= GLAMO_FIRE_MMC_RSPT_R1b;
409 fire |= GLAMO_FIRE_MMC_RSPT_R2;
412 fire |= GLAMO_FIRE_MMC_RSPT_R3;
414 /* R4 and R5 supported by chip not defined in linux/mmc/core.h (sdio) */
417 * From the command index, set up the command class in the host ctrllr
419 * missing guys present on chip but couldn't figure out how to use yet:
421 * 0x9 "cancel running command"
423 switch (cmd->opcode) {
424 case MMC_READ_SINGLE_BLOCK:
425 fire |= GLAMO_FIRE_MMC_CC_SBR; /* single block read */
427 case MMC_SWITCH: /* 64 byte payload */
428 case SD_APP_SEND_SCR:
429 case MMC_READ_MULTIPLE_BLOCK:
430 /* we will get an interrupt off this */
432 /* multiblock no stop */
433 fire |= GLAMO_FIRE_MMC_CC_MBRNS;
435 /* multiblock with stop */
436 fire |= GLAMO_FIRE_MMC_CC_MBRS;
438 case MMC_WRITE_BLOCK:
439 fire |= GLAMO_FIRE_MMC_CC_SBW; /* single block write */
441 case MMC_WRITE_MULTIPLE_BLOCK:
443 /* multiblock with stop */
444 fire |= GLAMO_FIRE_MMC_CC_MBWS;
446 /* multiblock NO stop-- 'RESERVED'? */
447 fire |= GLAMO_FIRE_MMC_CC_MBWNS;
449 case MMC_STOP_TRANSMISSION:
450 fire |= GLAMO_FIRE_MMC_CC_STOP; /* STOP */
453 fire |= GLAMO_FIRE_MMC_CC_BASIC; /* "basic command" */
456 /* always largest timeout */
457 writew(0xfff, host->mmio_base + GLAMO_REG_MMC_TIMEOUT);
459 /* Generate interrupt on txfer */
460 glamo_reg_set_bit_mask(host, GLAMO_REG_MMC_BASIC, ~0x3e,
461 0x0800 | GLAMO_BASIC_MMC_NO_CLK_RD_WAIT |
462 GLAMO_BASIC_MMC_EN_COMPL_INT | (sd_drive << 6));
464 /* send the command out on the wire */
465 /* dev_info(&host->pdev->dev, "Using FIRE %04X\n", fire); */
466 writew(fire, host->mmio_base + GLAMO_REG_MMC_CMD_FIRE);
468 /* we are deselecting card? because it isn't going to ack then... */
469 if ((cmd->opcode == 7) && (cmd->arg == 0))
473 * we must spin until response is ready or timed out
474 * -- we don't get interrupts unless there is a bulk rx
478 status = readw(host->mmio_base + GLAMO_REG_MMC_RB_STAT1);
479 while (((((status >> 15) & 1) != (host->request_counter & 1)) ||
480 (!(status & (GLAMO_STAT1_MMC_RB_RRDY |
481 GLAMO_STAT1_MMC_RTOUT |
482 GLAMO_STAT1_MMC_DTOUT |
483 GLAMO_STAT1_MMC_BWERR |
484 GLAMO_STAT1_MMC_BRERR)))) && (timeout--));
486 if ((status & (GLAMO_STAT1_MMC_RTOUT |
487 GLAMO_STAT1_MMC_DTOUT)) ||
489 cmd->error = -ETIMEDOUT;
490 } else if (status & (GLAMO_STAT1_MMC_BWERR |
491 GLAMO_STAT1_MMC_BRERR)) {
492 cmd->error = -EILSEQ;
495 if (cmd->flags & MMC_RSP_PRESENT) {
496 if (cmd->flags & MMC_RSP_136) {
497 cmd->resp[3] = readw(®_resp[0]) |
498 (readw(®_resp[1]) << 16);
499 cmd->resp[2] = readw(®_resp[2]) |
500 (readw(®_resp[3]) << 16);
501 cmd->resp[1] = readw(®_resp[4]) |
502 (readw(®_resp[5]) << 16);
503 cmd->resp[0] = readw(®_resp[6]) |
504 (readw(®_resp[7]) << 16);
506 cmd->resp[0] = (readw(®_resp[0]) >> 8) |
507 (readw(®_resp[1]) << 8) |
508 ((readw(®_resp[2])) << 24);
513 static int glamo_mci_prepare_pio(struct glamo_mci_host *host,
514 struct mmc_data *data)
516 /* set up the block info */
517 writew(data->blksz, host->mmio_base + GLAMO_REG_MMC_DATBLKLEN);
518 writew(data->blocks, host->mmio_base + GLAMO_REG_MMC_DATBLKCNT);
519 dev_dbg(&host->pdev->dev, "(blksz=%d, count=%d)\n",
520 data->blksz, data->blocks);
521 data->bytes_xfered = 0;
523 /* if write, prep the write into the shared RAM before the command */
524 if (data->flags & MMC_DATA_WRITE) {
530 static void glamo_mci_send_request(struct mmc_host *mmc)
532 struct glamo_mci_host *host = mmc_priv(mmc);
533 struct mmc_request *mrq = host->mrq;
534 struct mmc_command *cmd = mrq->cmd;
535 int timeout = 1000000;
537 host->request_counter++;
538 /* this guy has data to read/write? */
540 if(glamo_mci_prepare_pio(host, cmd->data)) {
541 cmd->data->error = -EIO;
546 dev_dbg(&host->pdev->dev,"cmd 0x%x, "
547 "arg 0x%x data=%p mrq->stop=%p flags 0x%x\n",
548 cmd->opcode, cmd->arg, cmd->data, cmd->mrq->stop,
551 /* resume requested clock rate
552 * scale it down by sd_slow_ratio if platform requests it
554 glamo_mci_fix_card_div(host, host->clk_div);
556 glamo_mci_send_command(host, cmd);
559 * if we don't have bulk data to take care of, we're done
561 if (!cmd->data || cmd->error)
565 * Otherwise can can use the interrupt as async completion --
566 * if there is read data coming, or we wait for write data to complete,
567 * exit without mmc_request_done() as the payload interrupt
570 dev_dbg(&host->pdev->dev, "Waiting for payload data\n");
572 * if the glamo INT# line isn't wired (*cough* it can happen)
573 * I'm afraid we have to spin on the IRQ status bit and "be
576 if (!host->pdata->pglamo->irq_works) {
578 * we have faith we will get an "interrupt"...
579 * but something insane like suspend problems can mean
580 * we spin here forever, so we timeout after a LONG time
582 while ((!(readw(host->pdata->pglamo->base +
583 GLAMO_REG_IRQ_STATUS) & GLAMO_IRQ_MMC)) &&
587 if (cmd->data->error)
588 cmd->data->error = -ETIMEDOUT;
589 dev_err(&host->pdev->dev, "Payload timeout\n");
592 /* ack this interrupt source */
593 writew(GLAMO_IRQ_MMC, host->pdata->pglamo->base +
594 GLAMO_REG_IRQ_CLEAR);
596 /* yay we are an interrupt controller! -- call the ISR
597 * it will stop clock to card
599 glamo_mci_irq(IRQ_GLAMO(GLAMO_IRQIDX_MMC), host);
604 mmc_request_done(host->mmc, cmd->mrq);
606 if (!sd_idleclk && !host->force_slow_during_powerup)
607 /* stop the clock to card */
608 glamo_mci_fix_card_div(host, -1);
611 static void glamo_mci_request(struct mmc_host *mmc, struct mmc_request *mrq)
613 struct glamo_mci_host *host = mmc_priv(mmc);
616 glamo_mci_send_request(mmc);
619 static void glamo_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
621 struct glamo_mci_host *host = mmc_priv(mmc);
625 if (host->suspending) {
626 dev_err(&host->pdev->dev, "IGNORING glamo_mci_set_ios while "
632 switch(ios->power_mode) {
634 mmc_regulator_set_ocr(host->regulator, ios->vdd);
635 host->vdd_current = ios->vdd;
639 * we should use very slow clock until first bulk
640 * transfer completes OK
642 host->force_slow_during_powerup = 1;
644 if (host->vdd_current != ios->vdd) {
645 mmc_regulator_set_ocr(host->regulator, ios->vdd);
646 host->vdd_current = ios->vdd;
648 if (host->power_mode_current == MMC_POWER_OFF) {
649 glamo_engine_enable(host->pdata->pglamo,
657 if (host->power_mode_current == MMC_POWER_OFF)
659 /* never want clocking with dead card */
660 glamo_mci_fix_card_div(host, -1);
662 glamo_engine_disable(host->pdata->pglamo,
665 mmc_regulator_set_ocr(host->regulator, 0);
666 host->vdd_current = -1;
669 host->power_mode_current = ios->power_mode;
671 glamo_mci_set_card_clock(host, ios->clock);
673 /* after power-up, we are meant to give it >= 74 clocks so it can
674 * initialize itself. Doubt any modern cards need it but anyway...
679 if (!sd_idleclk && !host->force_slow_during_powerup)
680 /* stop the clock to card, because we are idle until transfer */
681 glamo_mci_fix_card_div(host, -1);
683 if ((ios->power_mode == MMC_POWER_ON) ||
684 (ios->power_mode == MMC_POWER_UP)) {
685 dev_info(&host->pdev->dev,
686 "powered (vdd = %d) clk: %lukHz div=%d (req: %ukHz). "
687 "Bus width=%d\n",(int)ios->vdd,
688 host->real_rate / 1000, (int)host->clk_div,
689 ios->clock / 1000, (int)ios->bus_width);
691 dev_info(&host->pdev->dev, "glamo_mci_set_ios: power down.\n");
694 if (ios->bus_width == MMC_BUS_WIDTH_4)
695 bus_width = GLAMO_BASIC_MMC_EN_4BIT_DATA;
696 glamo_reg_set_bit_mask(host, GLAMO_REG_MMC_BASIC,
697 GLAMO_BASIC_MMC_EN_4BIT_DATA |
698 GLAMO_BASIC_MMC_EN_DR_STR0 |
699 GLAMO_BASIC_MMC_EN_DR_STR1,
700 bus_width | sd_drive << 6);
705 * no physical write protect supported by us
707 static int glamo_mci_get_ro(struct mmc_host *mmc)
712 static struct mmc_host_ops glamo_mci_ops = {
713 .request = glamo_mci_request,
714 .set_ios = glamo_mci_set_ios,
715 .get_ro = glamo_mci_get_ro,
718 static int glamo_mci_probe(struct platform_device *pdev)
720 struct mmc_host *mmc;
721 struct glamo_mci_host *host;
724 dev_info(&pdev->dev, "glamo_mci driver (C)2007 Openmoko, Inc\n");
726 mmc = mmc_alloc_host(sizeof(struct glamo_mci_host), &pdev->dev);
732 host = mmc_priv(mmc);
735 host->pdata = pdev->dev.platform_data;
736 host->power_mode_current = MMC_POWER_OFF;
738 spin_lock_init(&host->lock);
739 INIT_WORK(&host->irq_work, glamo_mci_irq_worker);
741 host->regulator = regulator_get(pdev->dev.parent, "SD_3V3");
742 if (!host->regulator) {
743 dev_err(&pdev->dev, "Cannot proceed without regulator.\n");
745 goto probe_free_host;
748 host->mmio_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
749 if (!host->mmio_mem) {
751 "failed to get io memory region resouce.\n");
753 goto probe_regulator_put;
756 host->mmio_mem = request_mem_region(host->mmio_mem->start,
757 resource_size(host->mmio_mem),
760 if (!host->mmio_mem) {
761 dev_err(&pdev->dev, "failed to request io memory region.\n");
763 goto probe_regulator_put;
766 host->mmio_base = ioremap(host->mmio_mem->start,
767 resource_size(host->mmio_mem));
768 if (!host->mmio_base) {
769 dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
771 goto probe_free_mem_region_mmio;
775 /* Get ahold of our data buffer we use for data in and out on MMC */
776 host->data_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
777 if (!host->data_mem) {
779 "failed to get io memory region resource.\n");
781 goto probe_iounmap_mmio;
784 host->data_mem = request_mem_region(host->data_mem->start,
785 resource_size(host->data_mem),
788 if (!host->data_mem) {
789 dev_err(&pdev->dev, "failed to request io memory region.\n");
791 goto probe_iounmap_mmio;
793 host->data_base = ioremap(host->data_mem->start,
794 resource_size(host->data_mem));
796 if (host->data_base == 0) {
797 dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
799 goto probe_free_mem_region_data;
802 ret = request_irq(IRQ_GLAMO(GLAMO_IRQIDX_MMC), glamo_mci_irq, IRQF_SHARED,
805 dev_err(&pdev->dev, "failed to register irq.\n");
806 goto probe_iounmap_data;
810 host->vdd_current = -1;
811 host->clk_rate = 50000000; /* really it's 49152000 */
814 /* explain our host controller capabilities */
815 mmc->ops = &glamo_mci_ops;
816 mmc->ocr_avail = mmc_regulator_get_ocrmask(host->regulator);
817 mmc->caps = MMC_CAP_4_BIT_DATA |
818 MMC_CAP_MMC_HIGHSPEED |
819 MMC_CAP_SD_HIGHSPEED;
820 mmc->f_min = host->clk_rate / 256;
821 mmc->f_max = sd_max_clk;
823 mmc->max_blk_count = (1 << 16) - 1; /* GLAMO_REG_MMC_RB_BLKCNT */
824 mmc->max_blk_size = (1 << 12) - 1; /* GLAMO_REG_MMC_RB_BLKLEN */
825 mmc->max_req_size = resource_size(host->data_mem);
826 mmc->max_seg_size = mmc->max_req_size;
827 mmc->max_phys_segs = 128;
828 mmc->max_hw_segs = 128;
830 platform_set_drvdata(pdev, mmc);
832 glamo_engine_enable(host->pdata->pglamo, GLAMO_ENGINE_MMC);
833 glamo_engine_reset(host->pdata->pglamo, GLAMO_ENGINE_MMC);
835 if ((ret = mmc_add_host(mmc))) {
836 dev_err(&pdev->dev, "failed to add mmc host.\n");
840 writew((u16)(host->data_mem->start),
841 host->mmio_base + GLAMO_REG_MMC_WDATADS1);
842 writew((u16)((host->data_mem->start) >> 16),
843 host->mmio_base + GLAMO_REG_MMC_WDATADS2);
845 writew((u16)host->data_mem->start, host->mmio_base +
846 GLAMO_REG_MMC_RDATADS1);
847 writew((u16)(host->data_mem->start >> 16), host->mmio_base +
848 GLAMO_REG_MMC_RDATADS2);
850 dev_info(&pdev->dev,"initialisation done.\n");
854 free_irq(IRQ_GLAMO(GLAMO_IRQIDX_MMC), host);
856 iounmap(host->data_base);
857 probe_free_mem_region_data:
858 release_mem_region(host->data_mem->start, resource_size(host->data_mem));
860 iounmap(host->mmio_base);
861 probe_free_mem_region_mmio:
862 release_mem_region(host->mmio_mem->start, resource_size(host->mmio_mem));
864 regulator_put(host->regulator);
871 static int glamo_mci_remove(struct platform_device *pdev)
873 struct mmc_host *mmc = platform_get_drvdata(pdev);
874 struct glamo_mci_host *host = mmc_priv(mmc);
876 free_irq(IRQ_GLAMO(GLAMO_IRQIDX_MMC), host);
878 mmc_remove_host(mmc);
879 iounmap(host->mmio_base);
880 iounmap(host->data_base);
881 release_mem_region(host->mmio_mem->start, resource_size(host->mmio_mem));
882 release_mem_region(host->data_mem->start, resource_size(host->data_mem));
884 regulator_put(host->regulator);
888 glamo_engine_disable(host->pdata->pglamo, GLAMO_ENGINE_MMC);
895 static int glamo_mci_suspend(struct platform_device *dev, pm_message_t state)
897 struct mmc_host *mmc = platform_get_drvdata(dev);
898 struct glamo_mci_host *host = mmc_priv(mmc);
901 cancel_work_sync(&host->irq_work);
904 * possible workaround for SD corruption during suspend - resume
905 * make sure the clock was running during suspend and consequently
908 glamo_mci_fix_card_div(host, host->clk_div);
910 /* we are going to do more commands to override this in
911 * mmc_suspend_host(), so we need to change sd_idleclk for the
914 suspend_sd_idleclk = sd_idleclk;
917 ret = mmc_suspend_host(mmc, state);
924 int glamo_mci_resume(struct platform_device *dev)
926 struct mmc_host *mmc = platform_get_drvdata(dev);
927 struct glamo_mci_host *host = mmc_priv(mmc);
932 glamo_engine_enable(host->pdata->pglamo, GLAMO_ENGINE_MMC);
933 glamo_engine_reset(host->pdata->pglamo, GLAMO_ENGINE_MMC);
937 ret = mmc_resume_host(mmc);
939 /* put sd_idleclk back to pre-suspend state */
940 sd_idleclk = suspend_sd_idleclk;
944 EXPORT_SYMBOL_GPL(glamo_mci_resume);
946 #else /* CONFIG_PM */
947 #define glamo_mci_suspend NULL
948 #define glamo_mci_resume NULL
949 #endif /* CONFIG_PM */
952 static struct platform_driver glamo_mci_driver =
954 .driver.name = "glamo-mci",
955 .probe = glamo_mci_probe,
956 .remove = glamo_mci_remove,
957 .suspend = glamo_mci_suspend,
958 .resume = glamo_mci_resume,
961 static int __init glamo_mci_init(void)
963 platform_driver_register(&glamo_mci_driver);
967 static void __exit glamo_mci_exit(void)
969 platform_driver_unregister(&glamo_mci_driver);
972 module_init(glamo_mci_init);
973 module_exit(glamo_mci_exit);
975 MODULE_DESCRIPTION("Glamo MMC/SD Card Interface driver");
976 MODULE_LICENSE("GPL");
977 MODULE_AUTHOR("Andy Green <andy@openmoko.com>");