2 * Copyright 2002 Integrated Device Technology, Inc.
5 * GPIO register definition.
7 * Author : ryan.holmQVist@idt.com
9 * Copyright (C) 2001, 2002 Ryan Holm <ryan.holmQVist@idt.com>
10 * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
13 #ifndef _RC32434_GPIO_H_
14 #define _RC32434_GPIO_H_
16 #include <linux/types.h>
18 struct rb500_gpio_reg {
19 u32 gpiofunc; /* GPIO Function Register
20 * gpiofunc[x]==0 bit = gpio
21 * func[x]==1 bit = altfunc
23 u32 gpiocfg; /* GPIO Configuration Register
24 * gpiocfg[x]==0 bit = input
25 * gpiocfg[x]==1 bit = output
27 u32 gpiod; /* GPIO Data Register
28 * gpiod[x] read/write gpio pinX status
30 u32 gpioilevel; /* GPIO Interrupt Status Register
31 * interrupt level (see gpioistat)
33 u32 gpioistat; /* Gpio Interrupt Status Register
34 * istat[x] = (gpiod[x] == level[x])
35 * cleared in ISR (STICKY bits)
37 u32 gpionmien; /* GPIO Non-maskable Interrupt Enable Register */
42 GPIO_gpio_v = 0, // gpiofunc use pin as GPIO.
43 GPIO_alt_v = 1, // gpiofunc use pin as alt.
44 GPIO_input_v = 0, // gpiocfg use pin as input.
45 GPIO_output_v = 1, // gpiocfg use pin as output.
47 GPIO_pin0_m = 0x00000001,
49 GPIO_pin1_m = 0x00000002,
51 GPIO_pin2_m = 0x00000004,
53 GPIO_pin3_m = 0x00000008,
55 GPIO_pin4_m = 0x00000010,
57 GPIO_pin5_m = 0x00000020,
59 GPIO_pin6_m = 0x00000040,
61 GPIO_pin7_m = 0x00000080,
63 GPIO_pin8_m = 0x00000100,
65 GPIO_pin9_m = 0x00000200,
67 GPIO_pin10_m = 0x00000400,
69 GPIO_pin11_m = 0x00000800,
71 GPIO_pin12_m = 0x00001000,
73 GPIO_pin13_m = 0x00002000,
75 GPIO_pin14_m = 0x00004000,
77 GPIO_pin15_m = 0x00008000,
79 GPIO_pin16_m = 0x00010000,
81 GPIO_pin17_m = 0x00020000,
83 GPIO_pin18_m = 0x00040000,
85 GPIO_pin19_m = 0x00080000,
87 GPIO_pin20_m = 0x00100000,
89 GPIO_pin21_m = 0x00200000,
91 GPIO_pin22_m = 0x00400000,
93 GPIO_pin23_m = 0x00800000,
95 GPIO_pin24_m = 0x01000000,
97 GPIO_pin25_m = 0x02000000,
99 GPIO_pin26_m = 0x04000000,
101 GPIO_pin27_m = 0x08000000,
103 GPIO_pin28_m = 0x10000000,
105 GPIO_pin29_m = 0x20000000,
107 GPIO_pin30_m = 0x40000000,
109 GPIO_pin31_m = 0x80000000,
111 // Alternate function pins. Corrsponding gpiofunc bit set to GPIO_alt_v.
113 GPIO_u0sout_b = GPIO_pin0_b, // UART 0 serial out.
114 GPIO_u0sout_m = GPIO_pin0_m,
115 GPIO_u0sout_cfg_v = GPIO_output_v,
116 GPIO_u0sinp_b = GPIO_pin1_b, // UART 0 serial in.
117 GPIO_u0sinp_m = GPIO_pin1_m,
118 GPIO_u0sinp_cfg_v = GPIO_input_v,
119 GPIO_u0rtsn_b = GPIO_pin2_b, // UART 0 req. to send.
120 GPIO_u0rtsn_m = GPIO_pin2_m,
121 GPIO_u0rtsn_cfg_v = GPIO_output_v,
122 GPIO_u0ctsn_b = GPIO_pin3_b, // UART 0 clear to send.
123 GPIO_u0ctsn_m = GPIO_pin3_m,
124 GPIO_u0ctsn_cfg_v = GPIO_input_v,
125 GPIO_maddr22_b = GPIO_pin4_b, // M&P bus bit 22.
126 GPIO_maddr22_m = GPIO_pin4_m,
127 GPIO_maddr22_cfg_v = GPIO_output_v,
129 GPIO_maddr23_b = GPIO_pin5_b, // M&P bus bit 23.
130 GPIO_maddr23_m = GPIO_pin5_m,
131 GPIO_maddr23_cfg_v = GPIO_output_v,
133 GPIO_maddr24_b = GPIO_pin6_b, // M&P bus bit 24.
134 GPIO_maddr24_m = GPIO_pin6_m,
135 GPIO_maddr24_cfg_v = GPIO_output_v,
137 GPIO_maddr25_b = GPIO_pin7_b, // M&P bus bit 25.
138 GPIO_maddr25_m = GPIO_pin7_m,
139 GPIO_maddr25_cfg_v = GPIO_output_v,
141 GPIO_cpu_b = GPIO_pin8_b, // M&P bus bit 25.
142 GPIO_cpu_m = GPIO_pin8_m,
143 GPIO_cpu_cfg_v = GPIO_output_v,
144 GPIO_afspare6_b = GPIO_pin9_b, // reserved.
145 GPIO_afspare6_m = GPIO_pin9_m,
146 GPIO_afspare6_cfg_v = GPIO_input_v,
147 GPIO_afspare4_b = GPIO_pin10_b, // reserved.
148 GPIO_afspare4_m = GPIO_pin10_m,
149 GPIO_afspare4_cfg_v = GPIO_input_v,
150 GPIO_afspare3_b = GPIO_pin11_b, // reserved.
151 GPIO_afspare3_m = GPIO_pin11_m,
152 GPIO_afspare3_cfg_v = GPIO_input_v,
153 GPIO_afspare2_b = GPIO_pin12_b, // reserved.
154 GPIO_afspare2_m = GPIO_pin12_m,
155 GPIO_afspare2_cfg_v = GPIO_input_v,
156 GPIO_pcimuintn_b = GPIO_pin13_b, // PCI messaging int.
157 GPIO_pcimuintn_m = GPIO_pin13_m,
158 GPIO_pcimuintn_cfg_v = GPIO_output_v,
162 extern int rb500_gpio_get_value(unsigned gpio);
163 extern void rb500_gpio_set_value(unsigned gpio, int value);
164 extern int rb500_gpio_direction_input(unsigned gpio);
165 extern int rb500_gpio_direction_output(unsigned gpio, int value);
168 /* Wrappers for the arch-neutral GPIO API */
170 static inline int gpio_request(unsigned gpio, const char *label)
172 /* Not yet implemented */
176 static inline void gpio_free(unsigned gpio)
178 /* Not yet implemented */
181 static inline int gpio_direction_input(unsigned gpio)
183 return rb500_gpio_direction_input(gpio);
186 static inline int gpio_direction_output(unsigned gpio, int value)
188 return rb500_gpio_direction_output(gpio, value);
191 static inline int gpio_get_value(unsigned gpio)
193 return rb500_gpio_get_value(gpio);
196 static inline void gpio_set_value(unsigned gpio, int value)
198 rb500_gpio_set_value(gpio, value);
201 static inline int gpio_to_irq(unsigned gpio)
206 static inline int irq_to_gpio(unsigned irq)
212 #include <asm-generic/gpio.h>
214 #endif /* _RC32434_GPIO_H_ */