target/linux/ramips/patches-4.9/101-mt7621-timer.patch

   1 Index: linux-4.9.37/arch/mips/kernel/smp-cmp.c
   2 ===================================================================
   3 --- linux-4.9.37.orig/arch/mips/kernel/smp-cmp.c
   4 +++ linux-4.9.37/arch/mips/kernel/smp-cmp.c
   5 @@ -43,6 +43,10 @@ static void cmp_init_secondary(void)
   6  {
   7         struct cpuinfo_mips *c __maybe_unused = &current_cpu_data;
   8
   9 +       printk("%s:%s[%d]%x\n", __FILE__, __func__, __LINE__, c->core);
  10 +       c->core = (read_c0_ebase() & 0x3ff) >> (fls(smp_num_siblings)-1);
  11 +       printk("%s:%s[%d]%x\n", __FILE__, __func__, __LINE__, c->core);
  12 +
  13         /* Assume GIC is present */
  14         change_c0_status(ST0_IM, STATUSF_IP2 | STATUSF_IP3 | STATUSF_IP4 |
  15                                  STATUSF_IP5 | STATUSF_IP6 | STATUSF_IP7);
  16 Index: linux-4.9.37/arch/mips/ralink/mt7621.c
  17 ===================================================================
  18 --- linux-4.9.37.orig/arch/mips/ralink/mt7621.c
  19 +++ linux-4.9.37/arch/mips/ralink/mt7621.c
  20 @@ -18,6 +18,7 @@
  21  #include <asm/mach-ralink/ralink_regs.h>
  22  #include <asm/mach-ralink/mt7621.h>
  23  #include <asm/mips-boards/launch.h>
  24 +#include <asm/delay.h>
  25
  26  #include <pinmux.h>
  27
  28 @@ -179,6 +180,58 @@ bool plat_cpu_core_present(int core)
  29         return true;
  30  }
  31
  32 +#define LPS_PREC 8
  33 +/*
  34 +*  Re-calibration lpj(loop-per-jiffy).
  35 +*  (derived from kernel/calibrate.c)
  36 +*/
  37 +static int udelay_recal(void)
  38 +{
  39 +       unsigned int i, lpj = 0;
  40 +       unsigned long ticks, loopbit;
  41 +       int lps_precision = LPS_PREC;
  42 +
  43 +       lpj = (1<<12);
  44 +
  45 +       while ((lpj <<= 1) != 0) {
  46 +               /* wait for "start of" clock tick */
  47 +               ticks = jiffies;
  48 +               while (ticks == jiffies)
  49 +                       /* nothing */;
  50 +
  51 +               /* Go .. */
  52 +               ticks = jiffies;
  53 +               __delay(lpj);
  54 +               ticks = jiffies - ticks;
  55 +               if (ticks)
  56 +                       break;
  57 +       }
  58 +
  59 +       /*
  60 +        * Do a binary approximation to get lpj set to
  61 +        * equal one clock (up to lps_precision bits)
  62 +        */
  63 +       lpj >>= 1;
  64 +       loopbit = lpj;
  65 +       while (lps_precision-- && (loopbit >>= 1)) {
  66 +               lpj |= loopbit;
  67 +               ticks = jiffies;
  68 +               while (ticks == jiffies)
  69 +                       /* nothing */;
  70 +               ticks = jiffies;
  71 +               __delay(lpj);
  72 +               if (jiffies != ticks)   /* longer than 1 tick */
  73 +                       lpj &= ~loopbit;
  74 +       }
  75 +       printk(KERN_INFO "%d CPUs re-calibrate udelay(lpj = %d)\n", NR_CPUS, lpj);
  76 +
  77 +       for(i=0; i< NR_CPUS; i++)
  78 +               cpu_data[i].udelay_val = lpj;
  79 +
  80 +       return 0;
  81 +}
  82 +device_initcall(udelay_recal);
  83 +
  84  void prom_soc_init(struct ralink_soc_info *soc_info)
  85  {
  86         void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE);
  87 Index: linux-4.9.37/arch/mips/ralink/Kconfig
  88 ===================================================================
  89 --- linux-4.9.37.orig/arch/mips/ralink/Kconfig
  90 +++ linux-4.9.37/arch/mips/ralink/Kconfig
  91 @@ -56,6 +56,7 @@ choice
  92                 select COMMON_CLK
  93                 select CLKSRC_MIPS_GIC
  94                 select HW_HAS_PCI
  95 +               select GENERIC_CLOCKEVENTS_BROADCAST
  96  endchoice
  97
  98  choice
  99 Index: linux-4.9.37/arch/mips/ralink/timer-gic.c
 100 ===================================================================
 101 --- linux-4.9.37.orig/arch/mips/ralink/timer-gic.c
 102 +++ linux-4.9.37/arch/mips/ralink/timer-gic.c
 103 @@ -12,6 +12,7 @@
 104  #include <linux/of.h>
 105  #include <linux/clk-provider.h>
 106  #include <linux/clocksource.h>
 107 +#include <asm/time.h>
 108
 109  #include "common.h"
 110
 111 @@ -19,6 +20,8 @@ void __init plat_time_init(void)
 112  {
 113         ralink_of_remap();
 114
 115 +       mips_hpt_frequency = 880000000 / 2;
 116 +
 117         of_clk_init(NULL);
 118         clocksource_probe();
 119  }