1 From d5c54ff3d1db0a4348fa04d8e78f3bf6063e3afc Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Mon, 7 Dec 2015 17:21:27 +0100
4 Subject: [PATCH 45/53] i2c: add mt7621 driver
6 Signed-off-by: John Crispin <blogic@openwrt.org>
8 drivers/i2c/busses/Kconfig | 4 +
9 drivers/i2c/busses/Makefile | 1 +
10 drivers/i2c/busses/i2c-mt7621.c | 303 +++++++++++++++++++++++++++++++++++++++
11 3 files changed, 308 insertions(+)
12 create mode 100644 drivers/i2c/busses/i2c-mt7621.c
14 --- a/drivers/i2c/busses/Kconfig
15 +++ b/drivers/i2c/busses/Kconfig
16 @@ -810,6 +810,10 @@ config I2C_RALINK
17 tristate "Ralink I2C Controller"
21 + tristate "MT7621 I2C Controller"
24 config HAVE_S3C2410_I2C
27 --- a/drivers/i2c/busses/Makefile
28 +++ b/drivers/i2c/busses/Makefile
29 @@ -76,6 +76,7 @@ obj-$(CONFIG_I2C_PUV3) += i2c-puv3.o
30 obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
31 obj-$(CONFIG_I2C_PXA_PCI) += i2c-pxa-pci.o
32 obj-$(CONFIG_I2C_RALINK) += i2c-ralink.o
33 +obj-$(CONFIG_I2C_MT7621) += i2c-mt7621.o
34 obj-$(CONFIG_I2C_QUP) += i2c-qup.o
35 obj-$(CONFIG_I2C_RIIC) += i2c-riic.o
36 obj-$(CONFIG_I2C_RK3X) += i2c-rk3x.o
38 +++ b/drivers/i2c/busses/i2c-mt7621.c
41 + * drivers/i2c/busses/i2c-mt7621.c
43 + * Copyright (C) 2013 Steven Liu <steven_liu@mediatek.com>
45 + * Improve driver for i2cdetect from i2c-tools to detect i2c devices on the bus.
46 + * (C) 2014 Sittisak <sittisaks@hotmail.com>
48 + * This software is licensed under the terms of the GNU General Public
49 + * License version 2, as published by the Free Software Foundation, and
50 + * may be copied, distributed, and modified under those terms.
52 + * This program is distributed in the hope that it will be useful,
53 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
54 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
55 + * GNU General Public License for more details.
59 +#include <linux/interrupt.h>
60 +#include <linux/kernel.h>
61 +#include <linux/module.h>
62 +#include <linux/reset.h>
63 +#include <linux/delay.h>
64 +#include <linux/slab.h>
65 +#include <linux/init.h>
66 +#include <linux/errno.h>
67 +#include <linux/platform_device.h>
68 +#include <linux/i2c.h>
69 +#include <linux/io.h>
70 +#include <linux/err.h>
72 +#include <asm/mach-ralink/ralink_regs.h>
74 +#define REG_CONFIG_REG 0x00
75 +#define REG_CLKDIV_REG 0x04
76 +#define REG_DEVADDR_REG 0x08
77 +#define REG_ADDR_REG 0x0C
78 +#define REG_DATAOUT_REG 0x10
79 +#define REG_DATAIN_REG 0x14
80 +#define REG_STATUS_REG 0x18
81 +#define REG_STARTXFR_REG 0x1C
82 +#define REG_BYTECNT_REG 0x20
83 +#define REG_SM0_IS_AUTOMODE 0x28
84 +#define REG_SM0CTL0 0x40
87 +#define I2C_STARTERR 0x10
88 +#define I2C_ACKERR 0x08
89 +#define I2C_DATARDY 0x04
90 +#define I2C_SDOEMPTY 0x02
91 +#define I2C_BUSY 0x01
93 +/* I2C_CFG register bit field */
94 +#define I2C_CFG_ADDRLEN_8 (7<<5) /* 8 bits */
95 +#define I2C_CFG_DEVADLEN_7 (6<<2)
96 +#define I2C_CFG_ADDRDIS BIT(1)
97 +#define I2C_CFG_DEVADDIS BIT(0)
99 +#define I2C_CFG_DEFAULT (I2C_CFG_ADDRLEN_8 | \
100 + I2C_CFG_DEVADLEN_7 | \
103 +#define I2C_RETRY 0x1000
105 +#define CLKDIV_VALUE 333
106 +#define i2c_busy_loop (CLKDIV_VALUE*30)
108 +#define READ_CMD 0x01
109 +#define WRITE_CMD 0x00
110 +#define READ_BLOCK 16
112 +#define SM0_ODRAIN BIT(31)
113 +#define SM0_VSYNC_MODE BIT(28)
114 +#define SM0_CLK_DIV (CLKDIV_VALUE << 16)
115 +#define SM0_WAIT_LEVEL BIT(6)
116 +#define SM0_EN BIT(1)
118 +#define SM0_CFG_DEFUALT (SM0_ODRAIN | SM0_VSYNC_MODE | \
119 + SM0_CLK_DIV | SM0_WAIT_LEVEL | \
121 +/***********************************************************/
123 +static void __iomem *membase;
124 +static struct i2c_adapter *adapter;
126 +static void rt_i2c_w32(u32 val, unsigned reg)
128 + iowrite32(val, membase + reg);
131 +static u32 rt_i2c_r32(unsigned reg)
133 + return ioread32(membase + reg);
136 +static void mt7621_i2c_reset(struct i2c_adapter *a)
138 + device_reset(a->dev.parent);
140 +static void mt7621_i2c_enable(struct i2c_msg *msg)
142 + rt_i2c_w32(msg->addr,REG_DEVADDR_REG);
143 + rt_i2c_w32(0,REG_ADDR_REG);
146 +static void i2c_master_init(struct i2c_adapter *a)
148 + mt7621_i2c_reset(a);
149 + rt_i2c_w32(I2C_CFG_DEFAULT,REG_CONFIG_REG);
150 + rt_i2c_w32(SM0_CFG_DEFUALT,REG_SM0CTL0);
151 + rt_i2c_w32(1,REG_SM0_IS_AUTOMODE);//auto mode
155 +static inline int rt_i2c_wait_rx_done(void)
158 + while((!(rt_i2c_r32(REG_STATUS_REG) & I2C_DATARDY)) && (i<i2c_busy_loop))
160 + if(i>=i2c_busy_loop){
161 + pr_err("err,wait for idle timeout");
167 +static inline int rt_i2c_wait_idle(void)
170 + while((rt_i2c_r32(REG_STATUS_REG) & I2C_BUSY) && (i<i2c_busy_loop))
172 + if(i>=i2c_busy_loop){
173 + pr_err("err,wait for idle timeout");
179 +static inline int rt_i2c_wait_tx_done(void)
182 + while((!(rt_i2c_r32(REG_STATUS_REG) & I2C_SDOEMPTY)) && (i<i2c_busy_loop))
184 + if(i>=i2c_busy_loop){
185 + pr_err("err,wait for idle timeout");
191 +static int rt_i2c_handle_msg(struct i2c_adapter *a, struct i2c_msg* msg)
193 + int i = 0, j = 0, pos = 0;
194 + int nblock = msg->len / READ_BLOCK;
195 + int rem = msg->len % READ_BLOCK;
197 + if (msg->flags & I2C_M_TEN) {
198 + printk("10 bits addr not supported\n");
202 + if (msg->flags & I2C_M_RD) {
203 + for (i = 0; i < nblock; i++) {
204 + if (rt_i2c_wait_idle())
206 + rt_i2c_w32(READ_BLOCK - 1, REG_BYTECNT_REG);
207 + rt_i2c_w32(READ_CMD, REG_STARTXFR_REG);
208 + for (j = 0; j < READ_BLOCK; j++) {
209 + if (rt_i2c_wait_rx_done())
211 + msg->buf[pos++] = rt_i2c_r32(REG_DATAIN_REG);
215 + if (rt_i2c_wait_idle())
217 + rt_i2c_w32(rem - 1, REG_BYTECNT_REG);
218 + rt_i2c_w32(READ_CMD, REG_STARTXFR_REG);
220 + for (i = 0; i < rem; i++) {
221 + if (rt_i2c_wait_rx_done())
223 + msg->buf[pos++] = rt_i2c_r32(REG_DATAIN_REG);
226 + if (rt_i2c_wait_idle())
228 + rt_i2c_w32(msg->len - 1, REG_BYTECNT_REG);
229 + for (i = 0; i < msg->len; i++) {
230 + rt_i2c_w32(msg->buf[i], REG_DATAOUT_REG);
232 + rt_i2c_w32(WRITE_CMD, REG_STARTXFR_REG);
234 + if (rt_i2c_wait_tx_done())
244 +static int rt_i2c_master_xfer(struct i2c_adapter *a, struct i2c_msg *m, int n)
248 + i2c_master_init(a);
249 + mt7621_i2c_enable(m);
251 + for (i = 0; i != n && ret==0; i++) {
252 + ret = rt_i2c_handle_msg(a, &m[i]);
259 +static u32 rt_i2c_func(struct i2c_adapter *a)
261 + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
264 +static const struct i2c_algorithm rt_i2c_algo = {
265 + .master_xfer = rt_i2c_master_xfer,
266 + .functionality = rt_i2c_func,
269 +static int rt_i2c_probe(struct platform_device *pdev)
271 + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
274 + adapter = devm_kzalloc(&pdev->dev,sizeof(struct i2c_adapter), GFP_KERNEL);
276 + dev_err(&pdev->dev, "failed to allocate i2c_adapter\n");
279 + membase = devm_ioremap_resource(&pdev->dev, res);
280 + if (IS_ERR(membase))
281 + return PTR_ERR(membase);
283 + strlcpy(adapter->name, dev_name(&pdev->dev), sizeof(adapter->name));
285 + adapter->owner = THIS_MODULE;
286 + adapter->nr = pdev->id;
287 + adapter->timeout = HZ;
288 + adapter->algo = &rt_i2c_algo;
289 + adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
290 + adapter->dev.parent = &pdev->dev;
291 + adapter->dev.of_node = pdev->dev.of_node;
293 + platform_set_drvdata(pdev, adapter);
295 + ret = i2c_add_numbered_adapter(adapter);
299 + dev_info(&pdev->dev,"loaded");
304 +static int rt_i2c_remove(struct platform_device *pdev)
306 + platform_set_drvdata(pdev, NULL);
310 +static const struct of_device_id i2c_rt_dt_ids[] = {
311 + { .compatible = "ralink,i2c-mt7621", },
315 +MODULE_DEVICE_TABLE(of, i2c_rt_dt_ids);
317 +static struct platform_driver rt_i2c_driver = {
318 + .probe = rt_i2c_probe,
319 + .remove = rt_i2c_remove,
321 + .owner = THIS_MODULE,
322 + .name = "i2c-mt7621",
323 + .of_match_table = i2c_rt_dt_ids,
327 +static int __init i2c_rt_init (void)
329 + return platform_driver_register(&rt_i2c_driver);
332 +static void __exit i2c_rt_exit (void)
334 + platform_driver_unregister(&rt_i2c_driver);
336 +module_init (i2c_rt_init);
337 +module_exit (i2c_rt_exit);
339 +MODULE_AUTHOR("Steven Liu <steven_liu@mediatek.com>");
340 +MODULE_DESCRIPTION("MT7621 I2c host driver");
341 +MODULE_LICENSE("GPL");
342 +MODULE_ALIAS("platform:MT7621-I2C");