target/linux/ramips/patches-3.14/0014-MIPS-ralink-add-MT7621-dts-file.patch

   1 From 34e2a5ededc6140f311b3b3c88edf4e18e88126a Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Fri, 24 Jan 2014 17:01:22 +0100
   4 Subject: [PATCH 14/57] MIPS: ralink: add MT7621 dts file
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  arch/mips/ralink/dts/Makefile        |    1 +
   9  arch/mips/ralink/dts/mt7621.dtsi     |  257 ++++++++++++++++++++++++++++++++++
  10  arch/mips/ralink/dts/mt7621_eval.dts |   16 +++
  11  3 files changed, 274 insertions(+)
  12  create mode 100644 arch/mips/ralink/dts/mt7621.dtsi
  13  create mode 100644 arch/mips/ralink/dts/mt7621_eval.dts
  14
  15 diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
  16 index 18194fa..9742c73 100644
  17 --- a/arch/mips/ralink/dts/Makefile
  18 +++ b/arch/mips/ralink/dts/Makefile
  19 @@ -2,3 +2,4 @@ obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
  20  obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
  21  obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
  22  obj-$(CONFIG_DTB_MT7620A_EVAL) := mt7620a_eval.dtb.o
  23 +obj-$(CONFIG_DTB_MT7621_EVAL) := mt7621_eval.dtb.o
  24 diff --git a/arch/mips/ralink/dts/mt7621.dtsi b/arch/mips/ralink/dts/mt7621.dtsi
  25 new file mode 100644
  26 index 0000000..6db2c57
  27 --- /dev/null
  28 +++ b/arch/mips/ralink/dts/mt7621.dtsi
  29 @@ -0,0 +1,257 @@
  30 +/ {
  31 +       #address-cells = <1>;
  32 +       #size-cells = <1>;
  33 +       compatible = "ralink,mtk7620a-soc";
  34 +
  35 +       cpus {
  36 +               cpu@0 {
  37 +                       compatible = "mips,mips24KEc";
  38 +               };
  39 +       };
  40 +
  41 +       cpuintc: cpuintc@0 {
  42 +               #address-cells = <0>;
  43 +               #interrupt-cells = <1>;
  44 +               interrupt-controller;
  45 +               compatible = "mti,cpu-interrupt-controller";
  46 +       };
  47 +
  48 +       palmbus@1E000000 {
  49 +               compatible = "palmbus";
  50 +               reg = <0x1E000000 0x100000>;
  51 +                ranges = <0x0 0x1E000000 0x0FFFFF>;
  52 +
  53 +               #address-cells = <1>;
  54 +               #size-cells = <1>;
  55 +
  56 +               sysc@0 {
  57 +                       compatible = "mtk,mt7621-sysc";
  58 +                       reg = <0x0 0x100>;
  59 +               };
  60 +
  61 +               wdt@100 {
  62 +                       compatible = "mtk,mt7621-wdt";
  63 +                       reg = <0x100 0x100>;
  64 +               };
  65 +
  66 +               gpio@600 {
  67 +                       #address-cells = <1>;
  68 +                       #size-cells = <0>;
  69 +
  70 +                       compatible = "mtk,mt7621-gpio";
  71 +                       reg = <0x600 0x100>;
  72 +
  73 +                       gpio0: bank@0 {
  74 +                               reg = <0>;
  75 +                               compatible = "mtk,mt7621-gpio-bank";
  76 +                               gpio-controller;
  77 +                               #gpio-cells = <2>;
  78 +                       };
  79 +
  80 +                       gpio1: bank@1 {
  81 +                               reg = <1>;
  82 +                               compatible = "mtk,mt7621-gpio-bank";
  83 +                               gpio-controller;
  84 +                               #gpio-cells = <2>;
  85 +                       };
  86 +
  87 +                       gpio2: bank@2 {
  88 +                               reg = <2>;
  89 +                               compatible = "mtk,mt7621-gpio-bank";
  90 +                               gpio-controller;
  91 +                               #gpio-cells = <2>;
  92 +                       };
  93 +               };
  94 +
  95 +               memc@5000 {
  96 +                       compatible = "mtk,mt7621-memc";
  97 +                       reg = <0x300 0x100>;
  98 +               };
  99 +
 100 +               uartlite@c00 {
 101 +                       compatible = "ns16550a";
 102 +                       reg = <0xc00 0x100>;
 103 +
 104 +                       interrupt-parent = <&gic>;
 105 +                       interrupts = <26>;
 106 +
 107 +                       reg-shift = <2>;
 108 +                       reg-io-width = <4>;
 109 +                       no-loopback-test;
 110 +               };
 111 +
 112 +               uart@d00 {
 113 +                       compatible = "ns16550a";
 114 +                       reg = <0xd00 0x100>;
 115 +
 116 +                       interrupt-parent = <&gic>;
 117 +                       interrupts = <27>;
 118 +
 119 +                       fifo-size = <16>;
 120 +                       reg-shift = <2>;
 121 +                       reg-io-width = <4>;
 122 +                       no-loopback-test;
 123 +               };
 124 +
 125 +               spi@b00 {
 126 +                       status = "okay";
 127 +
 128 +                       compatible = "ralink,mt7621-spi";
 129 +                       reg = <0xb00 0x100>;
 130 +
 131 +                       resets = <&rstctrl 18>;
 132 +                       reset-names = "spi";
 133 +
 134 +                       #address-cells = <1>;
 135 +                       #size-cells = <1>;
 136 +
 137 +/*                     pinctrl-names = "default";
 138 +                       pinctrl-0 = <&spi_pins>;*/
 139 +
 140 +                       m25p80@0 {
 141 +                               #address-cells = <1>;
 142 +                               #size-cells = <1>;
 143 +                               compatible = "en25q64";
 144 +                               reg = <0 0>;
 145 +                               linux,modalias = "m25p80", "en25q64";
 146 +                               spi-max-frequency = <10000000>;
 147 +
 148 +                               m25p,chunked-io;
 149 +
 150 +                               partition@0 {
 151 +                                       label = "u-boot";
 152 +                                       reg = <0x0 0x30000>;
 153 +                                       read-only;
 154 +                               };
 155 +
 156 +                               partition@30000 {
 157 +                                       label = "u-boot-env";
 158 +                                       reg = <0x30000 0x10000>;
 159 +                                       read-only;
 160 +                               };
 161 +
 162 +                               factory: partition@40000 {
 163 +                                       label = "factory";
 164 +                                       reg = <0x40000 0x10000>;
 165 +                                       read-only;
 166 +                               };
 167 +
 168 +                               partition@50000 {
 169 +                                       label = "firmware";
 170 +                                       reg = <0x50000 0x7a0000>;
 171 +                               };
 172 +
 173 +                               partition@7f0000 {
 174 +                                       label = "test";
 175 +                                       reg = <0x7f0000 0x10000>;
 176 +                               };
 177 +                       };
 178 +               };
 179 +       };
 180 +
 181 +       rstctrl: rstctrl {
 182 +               compatible = "ralink,rt2880-reset";
 183 +               #reset-cells = <1>;
 184 +       };
 185 +
 186 +       sdhci@1E130000 {
 187 +               compatible = "ralink,mt7620a-sdhci";
 188 +               reg = <0x1E130000 4000>;
 189 +
 190 +               interrupt-parent = <&gic>;
 191 +               interrupts = <20>;
 192 +       };
 193 +
 194 +       xhci@1E1C0000 {
 195 +               compatible = "xhci-platform";
 196 +               reg = <0x1E1C0000 4000>;
 197 +
 198 +               interrupt-parent = <&gic>;
 199 +               interrupts = <22>;
 200 +       };
 201 +
 202 +       gic: gic@1fbc0000 {
 203 +               #address-cells = <0>;
 204 +               #interrupt-cells = <1>;
 205 +               interrupt-controller;
 206 +               compatible = "ralink,mt7621-gic";
 207 +               reg = < 0x1fbc0000 0x80 /* gic */
 208 +                       0x1fbf0000 0x8000 /* cpc */
 209 +                       0x1fbf8000 0x8000 /* gpmc */
 210 +               >;
 211 +       };
 212 +
 213 +       nand@1e003000 {
 214 +               compatible = "mtk,mt7621-nand";
 215 +               bank-width = <2>;
 216 +               reg = <0x1e003000 0x800
 217 +                       0x1e003800 0x800>;
 218 +               #address-cells = <1>;
 219 +               #size-cells = <1>;
 220 +
 221 +               partition@0 {
 222 +                       label = "uboot";
 223 +                       reg = <0x00000 0x80000>; /* 64 KB */
 224 +               };
 225 +               partition@80000 {
 226 +                       label = "uboot_env";
 227 +                       reg = <0x80000 0x80000>; /* 64 KB */
 228 +               };
 229 +               partition@100000 {
 230 +                       label = "factory";
 231 +                       reg = <0x100000 0x40000>;
 232 +               };
 233 +               partition@140000 {
 234 +                       label = "rootfs";
 235 +                       reg = <0x140000 0xec0000>;
 236 +               };
 237 +       };
 238 +
 239 +       ethernet@1e100000 {
 240 +               compatible = "ralink,mt7621-eth";
 241 +               reg = <0x1e100000 10000>;
 242 +
 243 +               #address-cells = <1>;
 244 +               #size-cells = <0>;
 245 +
 246 +               ralink,port-map = "llllw";
 247 +
 248 +               interrupt-parent = <&gic>;
 249 +               interrupts = <3>;
 250 +
 251 +/*             resets = <&rstctrl 21 &rstctrl 23>;
 252 +               reset-names = "fe", "esw";
 253 +
 254 +               port@4 {
 255 +                       compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port";
 256 +                       reg = <4>;
 257 +
 258 +                       status = "disabled";
 259 +               };
 260 +
 261 +               port@5 {
 262 +                       compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port";
 263 +                       reg = <5>;
 264 +
 265 +                       status = "disabled";
 266 +               };
 267 +*/
 268 +               mdio-bus {
 269 +                       #address-cells = <1>;
 270 +                       #size-cells = <0>;
 271 +
 272 +                       phy1f: ethernet-phy@1f {
 273 +                               reg = <0x1f>;
 274 +                               phy-mode = "rgmii";
 275 +
 276 +/*                             interrupt-parent = <&gic>;
 277 +                               interrupts = <23>;
 278 +*/                     };
 279 +               };
 280 +       };
 281 +
 282 +       gsw@1e110000 {
 283 +               compatible = "ralink,mt7620a-gsw";
 284 +               reg = <0x1e110000 8000>;
 285 +       };
 286 +};
 287 diff --git a/arch/mips/ralink/dts/mt7621_eval.dts b/arch/mips/ralink/dts/mt7621_eval.dts
 288 new file mode 100644
 289 index 0000000..834f59c
 290 --- /dev/null
 291 +++ b/arch/mips/ralink/dts/mt7621_eval.dts
 292 @@ -0,0 +1,16 @@
 293 +/dts-v1/;
 294 +
 295 +/include/ "mt7621.dtsi"
 296 +
 297 +/ {
 298 +       compatible = "ralink,mt7621-eval-board", "ralink,mt7621-soc";
 299 +       model = "Ralink MT7621 evaluation board";
 300 +
 301 +       memory@0 {
 302 +               reg = <0x0 0x2000000>;
 303 +       };
 304 +
 305 +       chosen {
 306 +               bootargs = "console=ttyS0,57600";
 307 +       };
 308 +};
 309 --
 310 1.7.10.4
 311