1 From eb50d97682d78af68388d24956a74de4ab751cf7 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Mon, 2 Dec 2013 16:18:36 +0100
4 Subject: [PATCH 505/507] watchdog: add MT7621 support
6 Signed-off-by: John Crispin <blogic@openwrt.org>
8 drivers/watchdog/Kconfig | 7 ++
9 drivers/watchdog/Makefile | 1 +
10 drivers/watchdog/mt7621_wdt.c | 185 +++++++++++++++++++++++++++++++++++++++++
11 3 files changed, 193 insertions(+)
12 create mode 100644 drivers/watchdog/mt7621_wdt.c
14 --- a/drivers/watchdog/Kconfig
15 +++ b/drivers/watchdog/Kconfig
16 @@ -1116,7 +1116,14 @@ config LANTIQ_WDT
18 tristate "Ralink SoC watchdog"
21 + depends on RALINK && !SOC_MT7621
23 + Hardware driver for the Ralink SoC Watchdog Timer.
26 + tristate "Mediatek SoC watchdog"
27 + select WATCHDOG_CORE
28 + depends on RALINK && SOC_MT7621
30 Hardware driver for the Ralink SoC Watchdog Timer.
32 --- a/drivers/watchdog/Makefile
33 +++ b/drivers/watchdog/Makefile
34 @@ -136,6 +136,7 @@ obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o
35 octeon-wdt-y := octeon-wdt-main.o octeon-wdt-nmi.o
36 obj-$(CONFIG_LANTIQ_WDT) += lantiq_wdt.o
37 obj-$(CONFIG_RALINK_WDT) += rt2880_wdt.o
38 +obj-$(CONFIG_MT7621_WDT) += mt7621_wdt.o
43 +++ b/drivers/watchdog/mt7621_wdt.c
46 + * Ralink RT288x/RT3xxx/MT76xx built-in hardware watchdog timer
48 + * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
49 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
51 + * This driver was based on: drivers/watchdog/softdog.c
53 + * This program is free software; you can redistribute it and/or modify it
54 + * under the terms of the GNU General Public License version 2 as published
55 + * by the Free Software Foundation.
58 +#include <linux/clk.h>
59 +#include <linux/reset.h>
60 +#include <linux/module.h>
61 +#include <linux/kernel.h>
62 +#include <linux/watchdog.h>
63 +#include <linux/miscdevice.h>
64 +#include <linux/moduleparam.h>
65 +#include <linux/platform_device.h>
67 +#include <asm/mach-ralink/ralink_regs.h>
69 +#define SYSC_RSTSTAT 0x38
70 +#define WDT_RST_CAUSE BIT(1)
72 +#define RALINK_WDT_TIMEOUT 30
74 +#define TIMER_REG_TMRSTAT 0x00
75 +#define TIMER_REG_TMR1LOAD 0x24
76 +#define TIMER_REG_TMR1CTL 0x20
78 +#define TMR1CTL_ENABLE BIT(7)
79 +#define TMR1CTL_RESTART BIT(9)
81 +static void __iomem *mt762x_wdt_base;
83 +static bool nowayout = WATCHDOG_NOWAYOUT;
84 +module_param(nowayout, bool, 0);
85 +MODULE_PARM_DESC(nowayout,
86 + "Watchdog cannot be stopped once started (default="
87 + __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
89 +static inline void rt_wdt_w32(unsigned reg, u32 val)
91 + iowrite32(val, mt762x_wdt_base + reg);
94 +static inline u32 rt_wdt_r32(unsigned reg)
96 + return ioread32(mt762x_wdt_base + reg);
99 +static int mt762x_wdt_ping(struct watchdog_device *w)
101 + rt_wdt_w32(TIMER_REG_TMRSTAT, TMR1CTL_RESTART);
106 +static int mt762x_wdt_set_timeout(struct watchdog_device *w, unsigned int t)
109 + rt_wdt_w32(TIMER_REG_TMR1LOAD, t * 1000);
110 + mt762x_wdt_ping(w);
115 +static int mt762x_wdt_start(struct watchdog_device *w)
119 + rt_wdt_w32(TIMER_REG_TMR1CTL, 1000 << 16);
120 + mt762x_wdt_set_timeout(w, w->timeout);
122 + t = rt_wdt_r32(TIMER_REG_TMR1CTL);
123 + t |= TMR1CTL_ENABLE;
124 + rt_wdt_w32(TIMER_REG_TMR1CTL, t);
129 +static int mt762x_wdt_stop(struct watchdog_device *w)
133 + mt762x_wdt_ping(w);
135 + t = rt_wdt_r32(TIMER_REG_TMR1CTL);
136 + t &= ~TMR1CTL_ENABLE;
137 + rt_wdt_w32(TIMER_REG_TMR1CTL, t);
142 +static int mt762x_wdt_bootcause(void)
144 + if (rt_sysc_r32(SYSC_RSTSTAT) & WDT_RST_CAUSE)
145 + return WDIOF_CARDRESET;
150 +static struct watchdog_info mt762x_wdt_info = {
151 + .identity = "Mediatek Watchdog",
152 + .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
155 +static struct watchdog_ops mt762x_wdt_ops = {
156 + .owner = THIS_MODULE,
157 + .start = mt762x_wdt_start,
158 + .stop = mt762x_wdt_stop,
159 + .ping = mt762x_wdt_ping,
160 + .set_timeout = mt762x_wdt_set_timeout,
163 +static struct watchdog_device mt762x_wdt_dev = {
164 + .info = &mt762x_wdt_info,
165 + .ops = &mt762x_wdt_ops,
169 +static int mt762x_wdt_probe(struct platform_device *pdev)
171 + struct resource *res;
174 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
175 + mt762x_wdt_base = devm_request_and_ioremap(&pdev->dev, res);
176 + if (IS_ERR(mt762x_wdt_base))
177 + return PTR_ERR(mt762x_wdt_base);
179 + device_reset(&pdev->dev);
181 + mt762x_wdt_dev.dev = &pdev->dev;
182 + mt762x_wdt_dev.bootstatus = mt762x_wdt_bootcause();
183 + mt762x_wdt_dev.max_timeout = (0xfffful / 1000);
184 + mt762x_wdt_dev.timeout = mt762x_wdt_dev.max_timeout;
186 + watchdog_set_nowayout(&mt762x_wdt_dev, nowayout);
188 + ret = watchdog_register_device(&mt762x_wdt_dev);
190 + dev_info(&pdev->dev, "Initialized\n");
195 +static int mt762x_wdt_remove(struct platform_device *pdev)
197 + watchdog_unregister_device(&mt762x_wdt_dev);
202 +static void mt762x_wdt_shutdown(struct platform_device *pdev)
204 + mt762x_wdt_stop(&mt762x_wdt_dev);
207 +static const struct of_device_id mt762x_wdt_match[] = {
208 + { .compatible = "mtk,mt7621-wdt" },
211 +MODULE_DEVICE_TABLE(of, mt762x_wdt_match);
213 +static struct platform_driver mt762x_wdt_driver = {
214 + .probe = mt762x_wdt_probe,
215 + .remove = mt762x_wdt_remove,
216 + .shutdown = mt762x_wdt_shutdown,
218 + .name = KBUILD_MODNAME,
219 + .owner = THIS_MODULE,
220 + .of_match_table = mt762x_wdt_match,
224 +module_platform_driver(mt762x_wdt_driver);
226 +MODULE_DESCRIPTION("MediaTek MT762x hardware watchdog driver");
227 +MODULE_AUTHOR("John Crispin <blogic@openwrt.org");
228 +MODULE_LICENSE("GPL v2");
229 +MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);