2 #include "xhci-mtk-power.h"
5 #ifdef CONFIG_C60802_SUPPORT
6 #include "mtk-phy-c60802.h"
8 #include "xhci-mtk-scheduler.h"
9 #include <linux/kernel.h> /* printk() */
10 #include <linux/slab.h>
11 #include <linux/delay.h>
12 #include <asm/uaccess.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/platform_device.h>
16 void setInitialReg(void )
21 /* set SSUSB DMA burst size to 128B */
22 addr = SSUSB_U3_XHCI_BASE + SSUSB_HDMA_CFG;
23 temp = SSUSB_HDMA_CFG_MT7621_VALUE;
26 /* extend U3 LTSSM Polling.LFPS timeout value */
27 addr = SSUSB_U3_XHCI_BASE + U3_LTSSM_TIMING_PARAMETER3;
28 temp = U3_LTSSM_TIMING_PARAMETER3_VALUE;
32 addr = SSUSB_U3_XHCI_BASE + SYNC_HS_EOF;
33 temp = SYNC_HS_EOF_VALUE;
36 #if defined (CONFIG_PERIODIC_ENP)
37 /* HSCH_CFG1: SCH2_FIFO_DEPTH */
38 addr = SSUSB_U3_XHCI_BASE + HSCH_CFG1;
40 temp &= ~(0x3 << SCH2_FIFO_DEPTH_OFFSET);
44 /* Doorbell handling */
45 addr = SIFSLV_IPPC + SSUSB_IP_SPAR0;
49 /* Set SW PLL Stable mode to 1 for U2 LPM device remote wakeup */
51 addr = U2_PHY_BASE + U2_PHYD_CR1;
58 addr = U2_PHY_BASE_P1 + U2_PHYD_CR1;
66 void setLatchSel(void){
67 __u32 __iomem *latch_sel_addr;
69 latch_sel_addr = U3_PIPE_LATCH_SEL_ADD;
70 latch_sel_value = ((U3_PIPE_LATCH_TX)<<2) | (U3_PIPE_LATCH_RX);
71 writel(latch_sel_value, latch_sel_addr);
75 __u32 __iomem *ip_reset_addr;
78 enableAllClockPower();
79 mtk_xhci_scheduler_init();
82 void dbg_prb_out(void){
83 mtk_probe_init(0x0f0f0f0f);
84 mtk_probe_out(0xffffffff);
85 mtk_probe_out(0x01010101);
86 mtk_probe_out(0x02020202);
87 mtk_probe_out(0x04040404);
88 mtk_probe_out(0x08080808);
89 mtk_probe_out(0x10101010);
90 mtk_probe_out(0x20202020);
91 mtk_probe_out(0x40404040);
92 mtk_probe_out(0x80808080);
93 mtk_probe_out(0x55555555);
94 mtk_probe_out(0xaaaaaaaa);
99 ///////////////////////////////////////////////////////////////////////////////
101 #define RET_SUCCESS 0
104 static int dbg_u3w(int argc, char**argv)
112 printk(KERN_ERR "Arg: address value\n");
117 u4TimingAddress = (int)simple_strtol(argv[1], &argv[1], 16);
118 u4TimingValue = (int)simple_strtol(argv[2], &argv[2], 16);
119 u1TimingValue = u4TimingValue & 0xff;
120 /* access MMIO directly */
121 writel(u1TimingValue, u4TimingAddress);
122 printk(KERN_ERR "Write done\n");
127 static int dbg_u3r(int argc, char**argv)
129 char u1ReadTimingValue;
133 printk(KERN_ERR "Arg: address\n");
138 u4TimingAddress = (int)simple_strtol(argv[1], &argv[1], 16);
139 /* access MMIO directly */
140 u1ReadTimingValue = readl(u4TimingAddress);
141 printk(KERN_ERR "Value = 0x%x\n", u1ReadTimingValue);
145 static int dbg_u3init(int argc, char**argv)
149 printk(KERN_ERR "phy registers and operations initial done\n");
150 if(u3phy_ops->u2_slew_rate_calibration){
151 u3phy_ops->u2_slew_rate_calibration(u3phy);
154 printk(KERN_ERR "WARN: PHY doesn't implement u2 slew rate calibration function\n");
156 if(u3phy_ops->init(u3phy) == PHY_TRUE)
161 void dbg_setU1U2(int argc, char**argv){
162 struct xhci_hcd *xhci;
170 printk(KERN_ERR "Arg: u1value u2value\n");
174 u1_value = (int)simple_strtol(argv[1], &argv[1], 10);
175 u2_value = (int)simple_strtol(argv[2], &argv[2], 10);
176 addr = (SSUSB_U3_XHCI_BASE + 0x424);
178 temp = temp & (~(0x0000ffff));
179 temp = temp | u1_value | (u2_value<<8);
182 ///////////////////////////////////////////////////////////////////////////////
184 int call_function(char *buf)
193 argv[argc] = strsep(&buf, " ");
194 printk(KERN_DEBUG "[%d] %s\r\n", argc, argv[argc]);
197 if (!strcmp("dbg.r", argv[0]))
199 else if (!strcmp("dbg.u3w", argv[0]))
201 else if (!strcmp("dbg.u3r", argv[0]))
203 else if (!strcmp("dbg.u3i", argv[0]))
204 dbg_u3init(argc, argv);
205 else if (!strcmp("pw.u1u2", argv[0]))
206 dbg_setU1U2(argc, argv);
210 long xhci_mtk_test_unlock_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
213 char r_buf[200] = "this is a test";
218 copy_to_user((char *) arg, r_buf, len);
219 printk(KERN_DEBUG "IOCTL_READ: %s\r\n", r_buf);
222 copy_from_user(w_buf, (char *) arg, len);
223 printk(KERN_DEBUG "IOCTL_WRITE: %s\r\n", w_buf);
226 return call_function(w_buf);
235 int xhci_mtk_test_open(struct inode *inode, struct file *file)
238 printk(KERN_DEBUG "xhci_mtk_test open: successful\n");
242 int xhci_mtk_test_release(struct inode *inode, struct file *file)
245 printk(KERN_DEBUG "xhci_mtk_test release: successful\n");
249 ssize_t xhci_mtk_test_read(struct file *file, char *buf, size_t count, loff_t *ptr)
252 printk(KERN_DEBUG "xhci_mtk_test read: returning zero bytes\n");
256 ssize_t xhci_mtk_test_write(struct file *file, const char *buf, size_t count, loff_t * ppos)
259 printk(KERN_DEBUG "xhci_mtk_test write: accepting zero bytes\n");