1 #include <linux/ioport.h>
3 #include <rt305x_regs.h>
4 #include <rt305x_esw_platform.h>
6 #define RT305X_ESW_PHY_WRITE (1 << 13)
7 #define RT305X_ESW_PHY_TOUT (5 * HZ)
8 #define RT305X_ESW_PHY_CONTROL_0 0xC0
9 #define RT305X_ESW_PHY_CONTROL_1 0xC4
13 struct rt305x_esw_platform_data *pdata;
17 ramips_esw_wr(struct rt305x_esw *esw, u32 val, unsigned reg)
19 __raw_writel(val, esw->base + reg);
23 ramips_esw_rr(struct rt305x_esw *esw, unsigned reg)
25 return __raw_readl(esw->base + reg);
29 mii_mgr_write(struct rt305x_esw *esw, u32 phy_addr, u32 phy_register,
32 unsigned long volatile t_start = jiffies;
37 if(!(ramips_esw_rr(esw, RT305X_ESW_PHY_CONTROL_1) & (0x1 << 0)))
39 if(time_after(jiffies, t_start + RT305X_ESW_PHY_TOUT))
45 ramips_esw_wr(esw, ((write_data & 0xFFFF) << 16) | (phy_register << 8) |
46 (phy_addr) | RT305X_ESW_PHY_WRITE, RT305X_ESW_PHY_CONTROL_0);
50 if(ramips_esw_rr(esw, RT305X_ESW_PHY_CONTROL_1) & (0x1 << 0))
52 if(time_after(jiffies, t_start + RT305X_ESW_PHY_TOUT))
60 printk(KERN_ERR "ramips_eth: MDIO timeout\n");
65 rt305x_esw_hw_init(struct rt305x_esw *esw)
69 /* vodoo from original driver */
70 ramips_esw_wr(esw, 0xC8A07850, 0x08);
71 ramips_esw_wr(esw, 0x00000000, 0xe4);
72 ramips_esw_wr(esw, 0x00405555, 0x14);
73 ramips_esw_wr(esw, 0x00002001, 0x50);
74 ramips_esw_wr(esw, 0x00007f7f, 0x90);
75 ramips_esw_wr(esw, 0x00007f3f, 0x98);
76 ramips_esw_wr(esw, 0x00d6500c, 0xcc);
77 ramips_esw_wr(esw, 0x0008a301, 0x9c);
78 ramips_esw_wr(esw, 0x02404040, 0x8c);
79 ramips_esw_wr(esw, 0x00001002, 0x48);
80 ramips_esw_wr(esw, 0x3f502b28, 0xc8);
81 ramips_esw_wr(esw, 0x00000000, 0x84);
83 mii_mgr_write(esw, 0, 31, 0x8000);
84 for(i = 0; i < 5; i++)
86 mii_mgr_write(esw, i, 0, 0x3100); //TX10 waveform coefficient
87 mii_mgr_write(esw, i, 26, 0x1601); //TX10 waveform coefficient
88 mii_mgr_write(esw, i, 29, 0x7058); //TX100/TX10 AD/DA current bias
89 mii_mgr_write(esw, i, 30, 0x0018); //TX100 slew rate control
92 mii_mgr_write(esw, 0, 31, 0x0); //select global register
93 mii_mgr_write(esw, 0, 22, 0x052f); //tune TP_IDL tail and head waveform
94 mii_mgr_write(esw, 0, 17, 0x0fe0); //set TX10 signal amplitude threshold to minimum
95 mii_mgr_write(esw, 0, 18, 0x40ba); //set squelch amplitude to higher threshold
96 mii_mgr_write(esw, 0, 14, 0x65); //longer TP_IDL tail length
97 mii_mgr_write(esw, 0, 31, 0x8000); //select local register
99 /* set default vlan */
100 ramips_esw_wr(esw, 0x2001, 0x50);
101 ramips_esw_wr(esw, 0x504f, 0x70);
105 rt305x_esw_probe(struct platform_device *pdev)
107 struct rt305x_esw_platform_data *pdata;
108 struct rt305x_esw *esw;
109 struct resource *res;
112 pdata = pdev->dev.platform_data;
116 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
118 dev_err(&pdev->dev, "no memory resource found\n");
122 esw = kzalloc(sizeof (struct rt305x_esw), GFP_KERNEL);
124 dev_err(&pdev->dev, "no memory for private data\n");
128 esw->base = ioremap(res->start, resource_size(res));
130 dev_err(&pdev->dev, "ioremap failed\n");
135 platform_set_drvdata(pdev, esw);
138 rt305x_esw_hw_init(esw);
148 rt305x_esw_remove(struct platform_device *pdev)
150 struct rt305x_esw *esw;
152 esw = platform_get_drvdata(pdev);
154 platform_set_drvdata(pdev, NULL);
162 static struct platform_driver rt305x_esw_driver = {
163 .probe = rt305x_esw_probe,
164 .remove = rt305x_esw_remove,
166 .name = "rt305x-esw",
167 .owner = THIS_MODULE,
172 rt305x_esw_init(void)
174 return platform_driver_register(&rt305x_esw_driver);
178 rt305x_esw_exit(void)
180 platform_driver_unregister(&rt305x_esw_driver);