2 * Ralink RT305x SoC specific definitions
4 * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
6 * Parts of this file are based on Ralink's 2.6.21 BSP
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
16 #include <linux/init.h>
19 enum rt305x_soc_type {
20 RT305X_SOC_UNKNOWN = 0,
27 extern enum rt305x_soc_type rt305x_soc;
29 static inline int soc_is_rt3050(void)
31 return rt305x_soc == RT305X_SOC_RT3050;
34 static inline int soc_is_rt3052(void)
36 return rt305x_soc == RT305X_SOC_RT3052;
39 static inline int soc_is_rt305x(void)
41 return soc_is_rt3050() || soc_is_rt3052();
44 static inline int soc_is_rt3350(void)
46 return rt305x_soc == RT305X_SOC_RT3350;
49 static inline int soc_is_rt3352(void)
51 return rt305x_soc == RT305X_SOC_RT3352;
54 #define RT305X_MEM_SIZE_MIN (2 * 1024 * 1024)
55 #define RT305X_MEM_SIZE_MAX (64 * 1024 * 1024)
57 #define RT3352_MEM_SIZE_MIN (2 * 1024 * 1024)
58 #define RT3352_MEM_SIZE_MAX (256 * 1024 * 1024)
60 #define RT305X_CPU_IRQ_BASE 0
61 #define RT305X_INTC_IRQ_BASE 8
62 #define RT305X_INTC_IRQ_COUNT 32
63 #define RT305X_GPIO_IRQ_BASE 40
65 #define RT305X_CPU_IRQ_INTC (RT305X_CPU_IRQ_BASE + 2)
66 #define RT305X_CPU_IRQ_FE (RT305X_CPU_IRQ_BASE + 5)
67 #define RT305X_CPU_IRQ_WNIC (RT305X_CPU_IRQ_BASE + 6)
68 #define RT305X_CPU_IRQ_COUNTER (RT305X_CPU_IRQ_BASE + 7)
70 #define RT305X_INTC_IRQ_SYSCTL (RT305X_INTC_IRQ_BASE + 0)
71 #define RT305X_INTC_IRQ_TIMER0 (RT305X_INTC_IRQ_BASE + 1)
72 #define RT305X_INTC_IRQ_TIMER1 (RT305X_INTC_IRQ_BASE + 2)
73 #define RT305X_INTC_IRQ_IA (RT305X_INTC_IRQ_BASE + 3)
74 #define RT305X_INTC_IRQ_PCM (RT305X_INTC_IRQ_BASE + 4)
75 #define RT305X_INTC_IRQ_UART0 (RT305X_INTC_IRQ_BASE + 5)
76 #define RT305X_INTC_IRQ_PIO (RT305X_INTC_IRQ_BASE + 6)
77 #define RT305X_INTC_IRQ_DMA (RT305X_INTC_IRQ_BASE + 7)
78 #define RT305X_INTC_IRQ_NAND (RT305X_INTC_IRQ_BASE + 8)
79 #define RT305X_INTC_IRQ_PERFC (RT305X_INTC_IRQ_BASE + 9)
80 #define RT305X_INTC_IRQ_I2S (RT305X_INTC_IRQ_BASE + 10)
81 #define RT305X_INTC_IRQ_UART1 (RT305X_INTC_IRQ_BASE + 12)
82 #define RT305X_INTC_IRQ_ESW (RT305X_INTC_IRQ_BASE + 17)
83 #define RT305X_INTC_IRQ_OTG (RT305X_INTC_IRQ_BASE + 18)
85 extern void __iomem *rt305x_sysc_base;
86 extern void __iomem *rt305x_memc_base;
88 static inline void rt305x_sysc_wr(u32 val, unsigned reg)
90 __raw_writel(val, rt305x_sysc_base + reg);
93 static inline u32 rt305x_sysc_rr(unsigned reg)
95 return __raw_readl(rt305x_sysc_base + reg);
98 static inline void rt305x_memc_wr(u32 val, unsigned reg)
100 __raw_writel(val, rt305x_memc_base + reg);
103 static inline u32 rt305x_memc_rr(unsigned reg)
105 return __raw_readl(rt305x_memc_base + reg);
108 #define RT305X_GPIO_I2C_SD 1
109 #define RT305X_GPIO_I2C_SCLK 2
110 #define RT305X_GPIO_SPI_EN 3
111 #define RT305X_GPIO_SPI_CLK 4
112 #define RT305X_GPIO_SPI_DOUT 5
113 #define RT305X_GPIO_SPI_DIN 6
114 /* GPIO 7-14 is shared between UART0, PCM and I2S interfaces */
115 #define RT305X_GPIO_7 7
116 #define RT305X_GPIO_8 8
117 #define RT305X_GPIO_9 9
118 #define RT305X_GPIO_10 10
119 #define RT305X_GPIO_11 11
120 #define RT305X_GPIO_12 12
121 #define RT305X_GPIO_13 13
122 #define RT305X_GPIO_14 14
123 #define RT305X_GPIO_UART1_TXD 15
124 #define RT305X_GPIO_UART1_RXD 16
125 #define RT305X_GPIO_JTAG_TDO 17
126 #define RT305X_GPIO_JTAG_TDI 18
127 #define RT305X_GPIO_JTAG_TMS 19
128 #define RT305X_GPIO_JTAG_TCLK 20
129 #define RT305X_GPIO_JTAG_TRST_N 21
130 #define RT305X_GPIO_MDIO_MDC 22
131 #define RT305X_GPIO_MDIO_MDIO 23
132 #define RT305X_GPIO_SDRAM_MD16 24
133 #define RT305X_GPIO_SDRAM_MD17 25
134 #define RT305X_GPIO_SDRAM_MD18 26
135 #define RT305X_GPIO_SDRAM_MD19 27
136 #define RT305X_GPIO_SDRAM_MD20 28
137 #define RT305X_GPIO_SDRAM_MD21 29
138 #define RT305X_GPIO_SDRAM_MD22 30
139 #define RT305X_GPIO_SDRAM_MD23 31
140 #define RT305X_GPIO_SDRAM_MD24 32
141 #define RT305X_GPIO_SDRAM_MD25 33
142 #define RT305X_GPIO_SDRAM_MD26 34
143 #define RT305X_GPIO_SDRAM_MD27 35
144 #define RT305X_GPIO_SDRAM_MD28 36
145 #define RT305X_GPIO_SDRAM_MD29 37
146 #define RT305X_GPIO_SDRAM_MD30 38
147 #define RT305X_GPIO_SDRAM_MD31 39
148 #define RT305X_GPIO_GE0_TXD0 40
149 #define RT305X_GPIO_GE0_TXD1 41
150 #define RT305X_GPIO_GE0_TXD2 42
151 #define RT305X_GPIO_GE0_TXD3 43
152 #define RT305X_GPIO_GE0_TXEN 44
153 #define RT305X_GPIO_GE0_TXCLK 45
154 #define RT305X_GPIO_GE0_RXD0 46
155 #define RT305X_GPIO_GE0_RXD1 47
156 #define RT305X_GPIO_GE0_RXD2 48
157 #define RT305X_GPIO_GE0_RXD3 49
158 #define RT305X_GPIO_GE0_RXDV 50
159 #define RT305X_GPIO_GE0_RXCLK 51
161 void rt305x_gpio_init(u32 mode);
163 #endif /* _RT305X_H_ */