4 compatible = "ralink,rt3352-soc";
11 compatible = "mips,mips24KEc";
17 bootargs = "console=ttyS0,57600";
22 #interrupt-cells = <1>;
24 compatible = "mti,cpu-interrupt-controller";
33 palmbus: palmbus@10000000 {
34 compatible = "palmbus";
35 reg = <0x10000000 0x200000>;
36 ranges = <0x0 0x10000000 0x1FFFFF>;
42 compatible = "ralink,rt3352-sysc", "ralink,rt3050-sysc", "syscon";
47 compatible = "ralink,rt3352-timer", "ralink,rt2880-timer";
50 interrupt-parent = <&intc>;
54 watchdog: watchdog@120 {
55 compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt";
58 resets = <&rstctrl 8>;
61 interrupt-parent = <&intc>;
66 compatible = "ralink,rt3352-intc", "ralink,rt2880-intc";
70 #interrupt-cells = <1>;
72 interrupt-parent = <&cpuintc>;
77 compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
80 resets = <&rstctrl 20>;
83 interrupt-parent = <&intc>;
88 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
91 resets = <&rstctrl 12>;
94 interrupt-parent = <&intc>;
103 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
109 ralink,gpio-base = <0>;
110 ralink,nr-gpio = <24>;
111 ralink,register-map = [ 00 04 08 0c
114 resets = <&rstctrl 13>;
117 interrupt-parent = <&intc>;
122 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
128 ralink,gpio-base = <24>;
129 ralink,nr-gpio = <16>;
130 ralink,register-map = [ 00 04 08 0c
138 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
144 ralink,gpio-base = <40>;
145 ralink,nr-gpio = <6>;
146 ralink,register-map = [ 00 04 08 0c
154 compatible = "ralink,rt2880-i2c";
157 resets = <&rstctrl 16>;
160 #address-cells = <1>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&i2c_pins>;
170 compatible = "ralink,rt3352-i2s";
173 resets = <&rstctrl 17>;
176 interrupt-parent = <&intc>;
184 dma-names = "tx", "rx";
190 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
192 #address-cells = <1>;
195 resets = <&rstctrl 18>;
198 pinctrl-names = "default";
199 pinctrl-0 = <&spi_pins>;
205 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
207 #address-cells = <1>;
210 resets = <&rstctrl 18>;
213 pinctrl-names = "default";
214 pinctrl-0 = <&spi_cs1>;
219 uartlite: uartlite@c00 {
220 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
223 resets = <&rstctrl 19>;
224 reset-names = "uartl";
226 interrupt-parent = <&intc>;
231 pinctrl-names = "default";
232 pinctrl-0 = <&uartlite_pins>;
236 compatible = "ralink,rt3883-gdma";
237 reg = <0x2800 0x800>;
239 resets = <&rstctrl 14>;
242 interrupt-parent = <&intc>;
246 #dma-channels = <16>;
247 #dma-requests = <16>;
254 compatible = "ralink,rt2880-pinmux";
256 pinctrl-names = "default";
257 pinctrl-0 = <&state_default>;
259 state_default: pinctrl0 {
264 ralink,group = "i2c";
265 ralink,function = "i2c";
271 ralink,group = "mdio";
272 ralink,function = "mdio";
278 ralink,group = "rgmii";
279 ralink,function = "rgmii";
285 ralink,group = "spi";
286 ralink,function = "spi";
292 ralink,group = "spi_cs1";
293 ralink,function = "spi_cs1";
297 uartlite_pins: uartlite {
299 ralink,group = "uartlite";
300 ralink,function = "uartlite";
306 compatible = "ralink,rt3352-reset", "ralink,rt2880-reset";
311 compatible = "ralink,rt2880-clock";
315 ethernet: ethernet@10100000 {
316 compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
317 reg = <0x10100000 0x10000>;
319 resets = <&rstctrl 21>;
322 interrupt-parent = <&cpuintc>;
325 mediatek,switch = <&esw>;
329 compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
330 reg = <0x10110000 0x8000>;
332 resets = <&rstctrl 23>;
335 interrupt-parent = <&intc>;
340 compatible = "ralink,rt3352-usbphy";
343 ralink,sysctl = <&sysc>;
344 resets = <&rstctrl 22 &rstctrl 25>;
345 reset-names = "host", "device";
346 clocks = <&clkctrl 18 &clkctrl 20>;
347 clock-names = "host", "device";
350 wmac: wmac@10180000 {
351 compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac";
352 reg = <0x10180000 0x40000>;
354 interrupt-parent = <&cpuintc>;
357 ralink,eeprom = "soc_wmac.eeprom";
360 ehci: ehci@101c0000 {
361 #address-cells = <1>;
363 compatible = "generic-ehci";
364 reg = <0x101c0000 0x1000>;
369 interrupt-parent = <&intc>;
376 #trigger-source-cells = <0>;
380 ohci: ohci@101c1000 {
381 #address-cells = <1>;
383 compatible = "generic-ohci";
384 reg = <0x101c1000 0x1000>;
389 interrupt-parent = <&intc>;
396 #trigger-source-cells = <0>;