4 compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
8 compatible = "mips,mips24KEc";
13 bootargs = "console=ttyS0,57600";
22 #interrupt-cells = <1>;
24 compatible = "mti,cpu-interrupt-controller";
28 compatible = "palmbus";
29 reg = <0x10000000 0x200000>;
30 ranges = <0x0 0x10000000 0x1FFFFF>;
36 compatible = "ralink,rt3050-sysc";
41 compatible = "ralink,rt3050-timer", "ralink,rt2880-timer";
44 interrupt-parent = <&intc>;
49 compatible = "ralink,rt3050-wdt", "ralink,rt2880-wdt";
52 resets = <&rstctrl 8>;
55 interrupt-parent = <&intc>;
60 compatible = "ralink,rt3050-intc", "ralink,rt2880-intc";
63 resets = <&rstctrl 19>;
67 #interrupt-cells = <1>;
69 interrupt-parent = <&cpuintc>;
74 compatible = "ralink,rt3050-memc";
77 resets = <&rstctrl 20>;
80 interrupt-parent = <&intc>;
85 compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
88 resets = <&rstctrl 12>;
91 interrupt-parent = <&intc>;
100 compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
106 ralink,gpio-base = <0>;
107 ralink,num-gpios = <24>;
108 ralink,register-map = [ 00 04 08 0c
112 resets = <&rstctrl 13>;
115 interrupt-parent = <&intc>;
120 compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
126 ralink,gpio-base = <24>;
127 ralink,num-gpios = <16>;
128 ralink,register-map = [ 00 04 08 0c
136 compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
142 ralink,gpio-base = <40>;
143 ralink,num-gpios = <12>;
144 ralink,register-map = [ 00 04 08 0c
152 compatible = "ralink,rt3050-spi", "ralink,rt2880-spi";
155 resets = <&rstctrl 18>;
158 #address-cells = <1>;
161 pinctrl-names = "default";
162 pinctrl-0 = <&spi_pins>;
168 compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
171 resets = <&rstctrl 19>;
172 reset-names = "uartl";
174 interrupt-parent = <&intc>;
179 pinctrl-names = "default";
180 pinctrl-0 = <&uartlite_pins>;
185 compatible = "ralink,rt2880-pinmux";
187 pinctrl-names = "default";
188 pinctrl-0 = <&state_default>;
190 state_default: pinctrl0 {
192 ralink,group = "sdram";
193 ralink,function = "sdram";
199 ralink,group = "spi";
200 ralink,function = "spi";
204 uartlite_pins: uartlite {
206 ralink,group = "uartlite";
207 ralink,function = "uartlite";
213 compatible = "ralink,rt3050-reset", "ralink,rt2880-reset";
218 compatible = "ralink,rt3050-eth";
219 reg = <0x10100000 10000>;
221 resets = <&rstctrl 21>;
224 interrupt-parent = <&cpuintc>;
227 mediatek,switch = <&esw>;
231 compatible = "ralink,rt3050-esw";
232 reg = <0x10110000 8000>;
234 resets = <&rstctrl 23>;
237 interrupt-parent = <&intc>;
242 compatible = "ralink,rt3050-wmac", "ralink,rt2880-wmac";
243 reg = <0x10180000 40000>;
245 interrupt-parent = <&cpuintc>;
248 ralink,eeprom = "soc_wmac.eeprom";
252 compatible = "ralink,rt3050-otg", "snps,dwc2";
253 reg = <0x101c0000 40000>;
255 interrupt-parent = <&intc>;
258 resets = <&rstctrl 22>;