target/linux/ramips/dts/rt3050.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
   5
   6         cpus {
   7                 #address-cells = <1>;
   8                 #size-cells = <0>;
   9
  10                 cpu@0 {
  11                         compatible = "mips,mips24KEc";
  12                         reg = <0>;
  13                 };
  14         };
  15
  16         chosen {
  17                 bootargs = "console=ttyS0,57600";
  18         };
  19
  20         aliases {
  21                 spi0 = &spi0;
  22                 serial0 = &uartlite;
  23         };
  24
  25         cpuintc: cpuintc {
  26                 #address-cells = <0>;
  27                 #interrupt-cells = <1>;
  28                 interrupt-controller;
  29                 compatible = "mti,cpu-interrupt-controller";
  30         };
  31
  32         palmbus: palmbus@10000000 {
  33                 compatible = "palmbus";
  34                 reg = <0x10000000 0x200000>;
  35                 ranges = <0x0 0x10000000 0x1FFFFF>;
  36
  37                 #address-cells = <1>;
  38                 #size-cells = <1>;
  39
  40                 sysc: sysc@0 {
  41                         compatible = "ralink,rt3050-sysc", "syscon";
  42                         reg = <0x0 0x100>;
  43                 };
  44
  45                 timer: timer@100 {
  46                         compatible = "ralink,rt3050-timer", "ralink,rt2880-timer";
  47                         reg = <0x100 0x20>;
  48
  49                         interrupt-parent = <&intc>;
  50                         interrupts = <1>;
  51                 };
  52
  53                 watchdog: watchdog@120 {
  54                         compatible = "ralink,rt3050-wdt", "ralink,rt2880-wdt";
  55                         reg = <0x120 0x10>;
  56
  57                         resets = <&rstctrl 8>;
  58                         reset-names = "wdt";
  59
  60                         interrupt-parent = <&intc>;
  61                         interrupts = <1>;
  62                 };
  63
  64                 intc: intc@200 {
  65                         compatible = "ralink,rt3050-intc", "ralink,rt2880-intc";
  66                         reg = <0x200 0x100>;
  67
  68                         resets = <&rstctrl 19>;
  69                         reset-names = "intc";
  70
  71                         interrupt-controller;
  72                         #interrupt-cells = <1>;
  73
  74                         interrupt-parent = <&cpuintc>;
  75                         interrupts = <2>;
  76                 };
  77
  78                 memc: memc@300 {
  79                         compatible = "ralink,rt3050-memc";
  80                         reg = <0x300 0x100>;
  81
  82                         resets = <&rstctrl 20>;
  83                         reset-names = "mc";
  84
  85                         interrupt-parent = <&intc>;
  86                         interrupts = <3>;
  87                 };
  88
  89                 uart: uart@500 {
  90                         compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
  91                         reg = <0x500 0x100>;
  92
  93                         resets = <&rstctrl 12>;
  94                         reset-names = "uart";
  95
  96                         interrupt-parent = <&intc>;
  97                         interrupts = <5>;
  98
  99                         reg-shift = <2>;
 100
 101                         status = "disabled";
 102                 };
 103
 104                 gpio0: gpio@600 {
 105                         compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
 106                         reg = <0x600 0x34>;
 107
 108                         gpio-controller;
 109                         #gpio-cells = <2>;
 110
 111                         ralink,gpio-base = <0>;
 112                         ralink,nr-gpio = <24>;
 113                         ralink,register-map = [ 00 04 08 0c
 114                                                 20 24 28 2c
 115                                                 30 34 ];
 116
 117                         resets = <&rstctrl 13>;
 118                         reset-names = "pio";
 119
 120                         interrupt-parent = <&intc>;
 121                         interrupts = <6>;
 122                 };
 123
 124                 gpio1: gpio@638 {
 125                         compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
 126                         reg = <0x638 0x24>;
 127
 128                         gpio-controller;
 129                         #gpio-cells = <2>;
 130
 131                         ralink,gpio-base = <24>;
 132                         ralink,nr-gpio = <16>;
 133                         ralink,register-map = [ 00 04 08 0c
 134                                                 10 14 18 1c
 135                                                 20 24 ];
 136
 137                         status = "disabled";
 138                 };
 139
 140                 gpio2: gpio@660 {
 141                         compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
 142                         reg = <0x660 0x24>;
 143
 144                         gpio-controller;
 145                         #gpio-cells = <2>;
 146
 147                         ralink,gpio-base = <40>;
 148                         ralink,nr-gpio = <12>;
 149                         ralink,register-map = [ 00 04 08 0c
 150                                                 10 14 18 1c
 151                                                 20 24 ];
 152
 153                         status = "disabled";
 154                 };
 155
 156                 gdma: gdma@700 {
 157                         compatible = "ralink,rt305x-gdma";
 158                         reg = <0x700 0x100>;
 159
 160                         resets = <&rstctrl 14>;
 161                         reset-names = "dma";
 162
 163                         interrupt-parent = <&intc>;
 164                         interrupts = <7>;
 165
 166                         #dma-cells = <1>;
 167                         #dma-channels = <8>;
 168                         #dma-requests = <8>;
 169
 170                         status = "disabled";
 171                 };
 172
 173                 i2c@900 {
 174                         compatible = "ralink,rt2880-i2c";
 175                         reg = <0x900 0x100>;
 176
 177                         resets = <&rstctrl 16>;
 178                         reset-names = "i2c";
 179
 180                         #address-cells = <1>;
 181                         #size-cells = <0>;
 182
 183                         status = "disabled";
 184
 185                         pinctrl-names = "default";
 186                         pinctrl-0 = <&i2c_pins>;
 187                 };
 188
 189                 i2s@a00 {
 190                         compatible = "ralink,rt3050-i2s";
 191                         reg = <0xa00 0x100>;
 192
 193                         resets = <&rstctrl 17>;
 194                         reset-names = "i2s";
 195
 196                         interrupt-parent = <&intc>;
 197                         interrupts = <10>;
 198
 199                         txdma-req = <2>;
 200
 201                         dmas = <&gdma 4>;
 202                         dma-names = "tx";
 203
 204                         status = "disabled";
 205                 };
 206
 207                 spi0: spi@b00 {
 208                         compatible = "ralink,rt3050-spi", "ralink,rt2880-spi";
 209                         reg = <0xb00 0x100>;
 210
 211                         resets = <&rstctrl 18>;
 212                         reset-names = "spi";
 213
 214                         #address-cells = <1>;
 215                         #size-cells = <0>;
 216
 217                         pinctrl-names = "default";
 218                         pinctrl-0 = <&spi_pins>;
 219
 220                         status = "disabled";
 221                 };
 222
 223                 uartlite: uartlite@c00 {
 224                         compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
 225                         reg = <0xc00 0x100>;
 226
 227                         resets = <&rstctrl 19>;
 228                         reset-names = "uartl";
 229
 230                         interrupt-parent = <&intc>;
 231                         interrupts = <12>;
 232
 233                         reg-shift = <2>;
 234
 235                         pinctrl-names = "default";
 236                         pinctrl-0 = <&uartlite_pins>;
 237                 };
 238         };
 239
 240         pinctrl: pinctrl {
 241                 compatible = "ralink,rt2880-pinmux";
 242
 243                 pinctrl-names = "default";
 244                 pinctrl-0 = <&state_default>;
 245
 246                 state_default: pinctrl0 {
 247                         sdram {
 248                                 ralink,group = "sdram";
 249                                 ralink,function = "sdram";
 250                         };
 251                 };
 252
 253                 i2c_pins: i2c_pins {
 254                         i2c_pins {
 255                                 ralink,group = "i2c";
 256                                 ralink,function = "i2c";
 257                         };
 258                 };
 259
 260                 spi_pins: spi_pins {
 261                         spi_pins {
 262                                 ralink,group = "spi";
 263                                 ralink,function = "spi";
 264                         };
 265                 };
 266
 267                 rgmii_pins: rgmii {
 268                         rgmii {
 269                                 ralink,group = "rgmii";
 270                                 ralink,function = "rgmii";
 271                         };
 272                 };
 273
 274                 uartlite_pins: uartlite {
 275                         uart {
 276                                 ralink,group = "uartlite";
 277                                 ralink,function = "uartlite";
 278                         };
 279                 };
 280         };
 281
 282         rstctrl: rstctrl {
 283                 compatible = "ralink,rt3050-reset", "ralink,rt2880-reset";
 284                 #reset-cells = <1>;
 285         };
 286
 287         clkctrl: clkctrl {
 288                 compatible = "ralink,rt2880-clock";
 289                 #clock-cells = <1>;
 290         };
 291
 292         usbphy: usbphy {
 293                 compatible = "ralink,rt3050-usbphy";
 294                 #phy-cells = <0>;
 295
 296                 ralink,sysctl = <&sysc>;
 297                 resets = <&rstctrl 22>;
 298                 reset-names = "host";
 299                 clocks = <&clkctrl 18>;
 300                 clock-names = "host";
 301         };
 302
 303         ethernet: ethernet@10100000 {
 304                 compatible = "ralink,rt3050-eth";
 305                 reg = <0x10100000 0x10000>;
 306
 307                 resets = <&rstctrl 21>;
 308                 reset-names = "fe";
 309
 310                 interrupt-parent = <&cpuintc>;
 311                 interrupts = <5>;
 312
 313                 mediatek,switch = <&esw>;
 314         };
 315
 316         esw: esw@10110000 {
 317                 compatible = "ralink,rt3050-esw";
 318                 reg = <0x10110000 0x8000>;
 319
 320                 resets = <&rstctrl 23>;
 321                 reset-names = "esw";
 322
 323                 interrupt-parent = <&intc>;
 324                 interrupts = <17>;
 325         };
 326
 327         wmac: wmac@10180000 {
 328                 compatible = "ralink,rt3050-wmac", "ralink,rt2880-wmac";
 329                 reg = <0x10180000 0x40000>;
 330
 331                 interrupt-parent = <&cpuintc>;
 332                 interrupts = <6>;
 333
 334                 ralink,eeprom = "soc_wmac.eeprom";
 335         };
 336
 337         otg: otg@101c0000 {
 338                 #address-cells = <1>;
 339                 #size-cells = <0>;
 340                 compatible = "ralink,rt3050-otg", "snps,dwc2";
 341                 reg = <0x101c0000 0x40000>;
 342
 343                 interrupt-parent = <&intc>;
 344                 interrupts = <18>;
 345
 346                 resets = <&rstctrl 22>;
 347                 reset-names = "otg";
 348
 349                 status = "disabled";
 350
 351                 otg_port1: port@1 {
 352                         reg = <1>;
 353                         #trigger-source-cells = <0>;
 354                 };
 355         };
 356 };