4 compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
8 compatible = "mips,mips24KEc";
13 bootargs = "console=ttyS0,57600";
23 #interrupt-cells = <1>;
25 compatible = "mti,cpu-interrupt-controller";
29 compatible = "palmbus";
30 reg = <0x10000000 0x200000>;
31 ranges = <0x0 0x10000000 0x1FFFFF>;
37 compatible = "ralink,rt3050-sysc";
42 compatible = "ralink,rt3050-timer", "ralink,rt2880-timer";
45 interrupt-parent = <&intc>;
50 compatible = "ralink,rt3050-wdt", "ralink,rt2880-wdt";
53 resets = <&rstctrl 8>;
56 interrupt-parent = <&intc>;
61 compatible = "ralink,rt3050-intc", "ralink,rt2880-intc";
64 resets = <&rstctrl 19>;
68 #interrupt-cells = <1>;
70 interrupt-parent = <&cpuintc>;
75 compatible = "ralink,rt3050-memc";
78 resets = <&rstctrl 20>;
81 interrupt-parent = <&intc>;
86 compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
89 resets = <&rstctrl 12>;
92 interrupt-parent = <&intc>;
101 compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
107 ralink,gpio-base = <0>;
108 ralink,num-gpios = <24>;
109 ralink,register-map = [ 00 04 08 0c
113 resets = <&rstctrl 13>;
116 interrupt-parent = <&intc>;
121 compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
127 ralink,gpio-base = <24>;
128 ralink,num-gpios = <16>;
129 ralink,register-map = [ 00 04 08 0c
137 compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
143 ralink,gpio-base = <40>;
144 ralink,num-gpios = <12>;
145 ralink,register-map = [ 00 04 08 0c
153 compatible = "ralink,rt3050-spi", "ralink,rt2880-spi";
156 resets = <&rstctrl 18>;
159 #address-cells = <1>;
162 pinctrl-names = "default";
163 pinctrl-0 = <&spi_pins>;
168 uartlite: uartlite@c00 {
169 compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
172 resets = <&rstctrl 19>;
173 reset-names = "uartl";
175 interrupt-parent = <&intc>;
180 pinctrl-names = "default";
181 pinctrl-0 = <&uartlite_pins>;
186 compatible = "ralink,rt2880-pinmux";
188 pinctrl-names = "default";
189 pinctrl-0 = <&state_default>;
191 state_default: pinctrl0 {
193 ralink,group = "sdram";
194 ralink,function = "sdram";
200 ralink,group = "spi";
201 ralink,function = "spi";
205 uartlite_pins: uartlite {
207 ralink,group = "uartlite";
208 ralink,function = "uartlite";
214 compatible = "ralink,rt3050-reset", "ralink,rt2880-reset";
219 compatible = "ralink,rt3050-eth";
220 reg = <0x10100000 0x10000>;
222 resets = <&rstctrl 21>;
225 interrupt-parent = <&cpuintc>;
228 mediatek,switch = <&esw>;
232 compatible = "ralink,rt3050-esw";
233 reg = <0x10110000 0x8000>;
235 resets = <&rstctrl 23>;
238 interrupt-parent = <&intc>;
243 compatible = "ralink,rt3050-wmac", "ralink,rt2880-wmac";
244 reg = <0x10180000 0x40000>;
246 interrupt-parent = <&cpuintc>;
249 ralink,eeprom = "soc_wmac.eeprom";
253 compatible = "ralink,rt3050-otg", "snps,dwc2";
254 reg = <0x101c0000 0x40000>;
256 interrupt-parent = <&intc>;
259 resets = <&rstctrl 22>;