4 compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
8 compatible = "mips,mips24KEc";
13 bootargs = "console=ttyS0,57600";
18 #interrupt-cells = <1>;
20 compatible = "mti,cpu-interrupt-controller";
24 compatible = "palmbus";
25 reg = <0x10000000 0x200000>;
26 ranges = <0x0 0x10000000 0x1FFFFF>;
32 compatible = "ralink,rt3050-sysc";
37 compatible = "ralink,rt3050-timer", "ralink,rt2880-timer";
40 interrupt-parent = <&intc>;
45 compatible = "ralink,rt3050-wdt", "ralink,rt2880-wdt";
48 resets = <&rstctrl 8>;
51 interrupt-parent = <&intc>;
56 compatible = "ralink,rt3050-intc", "ralink,rt2880-intc";
59 resets = <&rstctrl 19>;
63 #interrupt-cells = <1>;
65 interrupt-parent = <&cpuintc>;
70 compatible = "ralink,rt3050-memc";
73 resets = <&rstctrl 20>;
76 interrupt-parent = <&intc>;
81 compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
84 resets = <&rstctrl 12>;
87 interrupt-parent = <&intc>;
96 compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
102 ralink,gpio-base = <0>;
103 ralink,num-gpios = <24>;
104 ralink,register-map = [ 00 04 08 0c
108 resets = <&rstctrl 13>;
111 interrupt-parent = <&intc>;
116 compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
122 ralink,gpio-base = <24>;
123 ralink,num-gpios = <16>;
124 ralink,register-map = [ 00 04 08 0c
132 compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
138 ralink,gpio-base = <40>;
139 ralink,num-gpios = <12>;
140 ralink,register-map = [ 00 04 08 0c
148 compatible = "ralink,rt3050-spi", "ralink,rt2880-spi";
151 resets = <&rstctrl 18>;
154 #address-cells = <1>;
157 pinctrl-names = "default";
158 pinctrl-0 = <&spi_pins>;
164 compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
167 resets = <&rstctrl 19>;
168 reset-names = "uartl";
170 interrupt-parent = <&intc>;
175 pinctrl-names = "default";
176 pinctrl-0 = <&uartlite_pins>;
181 compatible = "ralink,rt2880-pinmux";
183 pinctrl-names = "default";
184 pinctrl-0 = <&state_default>;
186 state_default: pinctrl0 {
188 ralink,group = "sdram";
189 ralink,function = "sdram";
195 ralink,group = "spi";
196 ralink,function = "spi";
200 uartlite_pins: uartlite {
202 ralink,group = "uartlite";
203 ralink,function = "uartlite";
209 compatible = "ralink,rt3050-reset", "ralink,rt2880-reset";
214 compatible = "ralink,rt3050-eth";
215 reg = <0x10100000 10000>;
217 resets = <&rstctrl 21>;
220 interrupt-parent = <&cpuintc>;
225 compatible = "ralink,rt3050-esw";
226 reg = <0x10110000 8000>;
228 resets = <&rstctrl 23>;
231 interrupt-parent = <&intc>;
236 compatible = "ralink,rt3050-wmac", "ralink,rt2880-wmac";
237 reg = <0x10180000 40000>;
239 interrupt-parent = <&cpuintc>;
242 ralink,eeprom = "soc_wmac.eeprom";
246 compatible = "ralink,rt3050-otg", "snps,dwc2";
247 reg = <0x101c0000 40000>;
249 interrupt-parent = <&intc>;
252 resets = <&rstctrl 22>;