ramips: add support for XiaoYu XY-C5
[oweals/openwrt.git] / target / linux / ramips / dts / mt7628an_wavlink_wl-wn570ha1.dts
1 /dts-v1/;
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
4
5 #include "mt7628an.dtsi"
6
7 / {
8         compatible = "wavlink,wl-wn570ha1", "mediatek,mt7628an-soc";
9         model = "Wavlink WL-WN570HA1";
10
11         chosen {
12                 bootargs = "console=ttyS0,57600";
13         };
14
15         keys {
16                 compatible = "gpio-keys-polled";
17                 poll-interval = <20>;
18
19                 reset {
20                         label = "reset";
21                         gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
22                         linux,code = <KEY_RESTART>;
23                 };
24         };
25
26         leds {
27                 compatible = "gpio-leds";
28
29                 power {
30                         label = "wl-wn570ha1:green:power";
31                         gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
32                         default-state = "keep";
33                 };
34
35                 wan {
36                         label = "wl-wn570ha1:green:wan";
37                         gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
38                 };
39
40                 wifi-high {
41                         label = "wl-wn570ha1:green:wifi-high";
42                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
43                 };
44
45                 wifi-med {
46                         label = "wl-wn570ha1:green:wifi-med";
47                         gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
48                 };
49
50                 wifi-low {
51                         label = "wl-wn570ha1:green:wifi-low";
52                         gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
53                 };
54
55                 wifi {
56                         label = "wl-wn570ha1:green:wifi";
57                         gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
58                 };
59         };
60 };
61
62 &pinctrl {
63         state_default: pinctrl0 {
64                 gpio {
65                         ralink,group = "i2c", "wled_an", "p0led_an", "wdt", "refclk";
66                         ralink,function = "gpio";
67                 };
68         };
69 };
70
71 &pcie {
72         status = "okay";
73 };
74
75 &pcie0 {
76         wifi@0,0 {
77                 reg = <0x0000 0 0 0 0>;
78                 mediatek,mtd-eeprom = <&factory 0x8000>;
79                 ieee80211-freq-limit = <5000000 6000000>;
80         };
81 };
82
83 &spi0 {
84         status = "okay";
85
86         flash@0 {
87                 compatible = "jedec,spi-nor";
88                 reg = <0>;
89                 spi-max-frequency = <10000000>;
90
91                 partitions {
92                         compatible = "fixed-partitions";
93                         #address-cells = <1>;
94                         #size-cells = <1>;
95
96                         partition@0 {
97                                 label = "u-boot";
98                                 reg = <0x0 0x30000>;
99                                 read-only;
100                         };
101
102                         partition@30000 {
103                                 label = "u-boot-env";
104                                 reg = <0x30000 0x10000>;
105                                 read-only;
106                         };
107
108                         factory: partition@40000 {
109                                 label = "factory";
110                                 reg = <0x40000 0x10000>;
111                                 read-only;
112                         };
113
114                         partition@50000 {
115                                 compatible = "denx,uimage";
116                                 label = "firmware";
117                                 reg = <0x50000 0x7b0000>;
118                         };
119                 };
120         };
121 };
122
123 &wmac {
124         status = "okay";
125 };
126
127 &ethernet {
128         mtd-mac-address = <&factory 0x2e>;
129         mediatek,portmap = "llllw";
130 };