4 compatible = "ralink,mtk7628an-soc";
8 compatible = "mips,mips24KEc";
13 bootargs = "console=ttyS0,57600";
22 #interrupt-cells = <1>;
24 compatible = "mti,cpu-interrupt-controller";
28 compatible = "palmbus";
29 reg = <0x10000000 0x200000>;
30 ranges = <0x0 0x10000000 0x1FFFFF>;
36 compatible = "ralink,mt7620a-sysc";
41 compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
44 resets = <&rstctrl 8>;
47 interrupt-parent = <&intc>;
52 compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
55 resets = <&rstctrl 9>;
59 #interrupt-cells = <1>;
61 interrupt-parent = <&cpuintc>;
64 ralink,intc-registers = <0x9c 0xa0
70 compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
73 resets = <&rstctrl 20>;
76 interrupt-parent = <&intc>;
84 compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
87 interrupt-parent = <&intc>;
92 compatible = "mtk,mt7621-gpio-bank";
99 compatible = "mtk,mt7621-gpio-bank";
106 compatible = "mtk,mt7621-gpio-bank";
113 compatible = "mediatek,mt7628-i2c";
116 resets = <&rstctrl 16>;
119 #address-cells = <1>;
124 pinctrl-names = "default";
125 pinctrl-0 = <&i2c_pins>;
129 compatible = "ralink,mt7620a-i2s";
132 resets = <&rstctrl 17>;
135 interrupt-parent = <&intc>;
140 dma-names = "tx", "rx";
146 compatible = "ralink,mt7621-spi";
149 resets = <&rstctrl 18>;
152 #address-cells = <1>;
155 pinctrl-names = "default";
156 pinctrl-0 = <&spi_pins>;
161 uartlite: uartlite@c00 {
162 compatible = "ns16550a";
169 resets = <&rstctrl 12>;
170 reset-names = "uartl";
172 interrupt-parent = <&intc>;
175 pinctrl-names = "default";
176 pinctrl-0 = <&uart0_pins>;
180 compatible = "ns16550a";
187 resets = <&rstctrl 19>;
188 reset-names = "uart1";
190 interrupt-parent = <&intc>;
193 pinctrl-names = "default";
194 pinctrl-0 = <&uart1_pins>;
200 compatible = "ns16550a";
207 resets = <&rstctrl 20>;
208 reset-names = "uart2";
210 interrupt-parent = <&intc>;
213 pinctrl-names = "default";
214 pinctrl-0 = <&uart2_pins>;
220 compatible = "mediatek,mt7628-pwm";
221 reg = <0x5000 0x1000>;
223 resets = <&rstctrl 31>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
233 compatible = "ralink,mt7620a-pcm";
234 reg = <0x2000 0x800>;
236 resets = <&rstctrl 11>;
239 interrupt-parent = <&intc>;
246 compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
247 reg = <0x2800 0x800>;
249 resets = <&rstctrl 14>;
252 interrupt-parent = <&intc>;
256 #dma-channels = <16>;
257 #dma-requests = <16>;
264 compatible = "ralink,rt2880-pinmux";
265 pinctrl-names = "default";
266 pinctrl-0 = <&state_default>;
268 state_default: pinctrl0 {
273 ralink,group = "spi";
274 ralink,function = "spi";
278 spi_cs1_pins: spi_cs1 {
280 ralink,group = "spi cs1";
281 ralink,function = "spi cs1";
287 ralink,group = "i2c";
288 ralink,function = "i2c";
292 uart0_pins: uartlite {
294 ralink,group = "uart0";
295 ralink,function = "uart0";
301 ralink,group = "uart1";
302 ralink,function = "uart1";
308 ralink,group = "uart2";
309 ralink,function = "uart2";
315 ralink,group = "sdmode";
316 ralink,function = "sdxc";
322 ralink,group = "pwm0";
323 ralink,function = "pwm0";
329 ralink,group = "pwm1";
330 ralink,function = "pwm1";
336 ralink,group = "i2s";
337 ralink,function = "pcm";
343 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
347 usbphy: usbphy@10120000 {
348 compatible = "ralink,mt7628an-usbphy", "mediatek,mt7620-usbphy";
349 reg = <0x10120000 0x4000>;
352 resets = <&rstctrl 22 &rstctrl 25>;
353 reset-names = "host", "device";
357 compatible = "ralink,mt7620-sdhci";
358 reg = <0x10130000 0x4000>;
360 interrupt-parent = <&intc>;
363 pinctrl-names = "default";
364 pinctrl-0 = <&sdxc_pins>;
370 compatible = "generic-ehci";
371 reg = <0x101c0000 0x1000>;
376 interrupt-parent = <&intc>;
381 compatible = "generic-ohci";
382 reg = <0x101c1000 0x1000>;
387 interrupt-parent = <&intc>;
392 compatible = "ralink,rt5350-eth";
393 reg = <0x10100000 0x10000>;
395 interrupt-parent = <&cpuintc>;
398 resets = <&rstctrl 21 &rstctrl 23>;
399 reset-names = "fe", "esw";
401 mediatek,switch = <&esw>;
405 compatible = "ralink,rt3050-esw";
406 reg = <0x10110000 0x8000>;
408 resets = <&rstctrl 23>;
411 interrupt-parent = <&intc>;
416 compatible = "mediatek,mt7620-pci";
417 reg = <0x10140000 0x100
420 #address-cells = <3>;
423 resets = <&rstctrl 26>;
424 reset-names = "pcie0";
426 interrupt-parent = <&cpuintc>;
435 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
436 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
440 reg = <0x0000 0 0 0 0>;
442 #address-cells = <3>;
449 wmac: wmac@10300000 {
450 compatible = "mediatek,mt7628-wmac";
451 reg = <0x10300000 0x100000>;
453 interrupt-parent = <&cpuintc>;
458 mediatek,mtd-eeprom = <&factory 0x0000>;