target/linux/ramips/dts/mt7628an.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "ralink,mtk7628an-soc";
   5
   6         cpus {
   7                 cpu@0 {
   8                         compatible = "mips,mips24KEc";
   9                 };
  10         };
  11
  12         chosen {
  13                 bootargs = "console=ttyS0,57600";
  14         };
  15
  16         cpuintc: cpuintc@0 {
  17                 #address-cells = <0>;
  18                 #interrupt-cells = <1>;
  19                 interrupt-controller;
  20                 compatible = "mti,cpu-interrupt-controller";
  21         };
  22
  23         palmbus@10000000 {
  24                 compatible = "palmbus";
  25                 reg = <0x10000000 0x200000>;
  26                 ranges = <0x0 0x10000000 0x1FFFFF>;
  27
  28                 #address-cells = <1>;
  29                 #size-cells = <1>;
  30
  31                 sysc@0 {
  32                         compatible = "ralink,mt7620a-sysc";
  33                         reg = <0x0 0x100>;
  34                 };
  35
  36                 watchdog@120 {
  37                         compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
  38                         reg = <0x120 0x10>;
  39
  40                         resets = <&rstctrl 8>;
  41                         reset-names = "wdt";
  42
  43                         interrupt-parent = <&intc>;
  44                         interrupts = <24>;
  45                 };
  46
  47                 intc: intc@200 {
  48                         compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
  49                         reg = <0x200 0x100>;
  50
  51                         resets = <&rstctrl 9>;
  52                         reset-names = "intc";
  53
  54                         interrupt-controller;
  55                         #interrupt-cells = <1>;
  56
  57                         interrupt-parent = <&cpuintc>;
  58                         interrupts = <2>;
  59
  60                         ralink,intc-registers = <0x9c 0xa0
  61                                                  0x6c 0xa4
  62                                                  0x80 0x78>;
  63                 };
  64
  65                 memc@300 {
  66                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  67                         reg = <0x300 0x100>;
  68
  69                         resets = <&rstctrl 20>;
  70                         reset-names = "mc";
  71
  72                         interrupt-parent = <&intc>;
  73                         interrupts = <3>;
  74                 };
  75
  76                 gpio@600 {
  77                         #address-cells = <1>;
  78                         #size-cells = <0>;
  79
  80                         compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
  81                         reg = <0x600 0x100>;
  82
  83                         gpio0: bank@0 {
  84                                 reg = <0>;
  85                                 compatible = "mtk,mt7621-gpio-bank";
  86                                 gpio-controller;
  87                                 #gpio-cells = <2>;
  88                         };
  89
  90                         gpio1: bank@1 {
  91                                 reg = <1>;
  92                                 compatible = "mtk,mt7621-gpio-bank";
  93                                 gpio-controller;
  94                                 #gpio-cells = <2>;
  95                         };
  96
  97                         gpio2: bank@2 {
  98                                 reg = <2>;
  99                                 compatible = "mtk,mt7621-gpio-bank";
 100                                 gpio-controller;
 101                                 #gpio-cells = <2>;
 102                         };
 103                 };
 104
 105                 spi@b00 {
 106                         compatible = "ralink,mt7621-spi";
 107                         reg = <0xb00 0x100>;
 108
 109                         resets = <&rstctrl 18>;
 110                         reset-names = "spi";
 111
 112                         #address-cells = <1>;
 113                         #size-cells = <1>;
 114
 115                         pinctrl-names = "default";
 116                         pinctrl-0 = <&spi_pins>;
 117
 118                         status = "disabled";
 119                 };
 120
 121                 uartlite@c00 {
 122                         compatible = "ns16550a";
 123                         reg = <0xc00 0x100>;
 124
 125                         reg-shift = <2>;
 126                         reg-io-width = <4>;
 127                         no-loopback-test;
 128
 129                         resets = <&rstctrl 12>;
 130                         reset-names = "uartl";
 131
 132                         interrupt-parent = <&intc>;
 133                         interrupts = <20>;
 134
 135                         pinctrl-names = "default";
 136                         pinctrl-0 = <&uart0_pins>;
 137                 };
 138
 139                 uart1@d00 {
 140                         compatible = "ns16550a";
 141                         reg = <0xd00 0x100>;
 142
 143                         reg-shift = <2>;
 144                         reg-io-width = <4>;
 145                         no-loopback-test;
 146
 147                         resets = <&rstctrl 19>;
 148                         reset-names = "uart1";
 149
 150                         interrupt-parent = <&intc>;
 151                         interrupts = <21>;
 152
 153                         pinctrl-names = "default";
 154                         pinctrl-0 = <&uart1_pins>;
 155
 156                         status = "disabled";
 157                 };
 158
 159                 uart2@e00 {
 160                         compatible = "ns16550a";
 161                         reg = <0xe00 0x100>;
 162
 163                         reg-shift = <2>;
 164                         reg-io-width = <4>;
 165                         no-loopback-test;
 166
 167                         resets = <&rstctrl 20>;
 168                         reset-names = "uart2";
 169
 170                         interrupt-parent = <&intc>;
 171                         interrupts = <22>;
 172
 173                         pinctrl-names = "default";
 174                         pinctrl-0 = <&uart2_pins>;
 175
 176                         status = "disabled";
 177                 };
 178         };
 179
 180         pinctrl {
 181                 compatible = "ralink,rt2880-pinmux";
 182                 pinctrl-names = "default";
 183                 pinctrl-0 = <&state_default>;
 184                 state_default: pinctrl0 {
 185                 };
 186                 spi_pins: spi {
 187                         spi {
 188                                 ralink,group = "spi";
 189                                 ralink,function = "spi";
 190                         };
 191                 };
 192                 uart0_pins: uartlite {
 193                         uartlite {
 194                                 ralink,group = "uart0";
 195                                 ralink,function = "uart0";
 196                         };
 197                 };
 198                 uart1_pins: uart1 {
 199                         uart1 {
 200                                 ralink,group = "uart1";
 201                                 ralink,function = "uart1";
 202                         };
 203                 };
 204                 uart2_pins: uart2 {
 205                         uart2 {
 206                                 ralink,group = "uart2";
 207                                 ralink,function = "uart2";
 208                         };
 209                 };
 210                 sdxc_pins: sdxc {
 211                         sdxc {
 212                                 ralink,group = "sdmode";
 213                                 ralink,function = "sdxc";
 214                         };
 215                 };
 216         };
 217
 218         rstctrl: rstctrl {
 219                 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 220                 #reset-cells = <1>;
 221         };
 222
 223         usbphy: usbphy {
 224                 compatible = "ralink,mt7628an-usbphy", "ralink,mt7620a-usbphy";
 225                 #phy-cells = <1>;
 226
 227                 resets = <&rstctrl 22>;
 228                 reset-names = "host";
 229         };
 230
 231         sdhci@10130000 {
 232                 compatible = "ralink,mt7620-sdhci";
 233                 reg = <0x10130000 4000>;
 234
 235                 interrupt-parent = <&intc>;
 236                 interrupts = <14>;
 237
 238                 pinctrl-names = "default";
 239                 pinctrl-0 = <&sdxc_pins>;
 240
 241                 status = "disabled";
 242         };
 243
 244         ehci@101c0000 {
 245                 compatible = "ralink,rt3xxx-ehci";
 246                 reg = <0x101c0000 0x1000>;
 247
 248                 phys = <&usbphy 1>;
 249                 phy-names = "usb";
 250
 251                 interrupt-parent = <&intc>;
 252                 interrupts = <18>;
 253         };
 254
 255         ohci@101c1000 {
 256                 compatible = "ralink,rt3xxx-ohci";
 257                 reg = <0x101c1000 0x1000>;
 258
 259                 phys = <&usbphy 1>;
 260                 phy-names = "usb";
 261
 262                 interrupt-parent = <&intc>;
 263                 interrupts = <18>;
 264         };
 265
 266         ethernet@10100000 {
 267                 compatible = "ralink,rt5350-eth";
 268                 reg = <0x10100000 10000>;
 269
 270                 interrupt-parent = <&cpuintc>;
 271                 interrupts = <5>;
 272
 273                 resets = <&rstctrl 21 &rstctrl 23>;
 274                 reset-names = "fe", "esw";
 275         };
 276
 277         esw@10110000 {
 278                 compatible = "ralink,rt3050-esw";
 279                 reg = <0x10110000 8000>;
 280
 281                 resets = <&rstctrl 23>;
 282                 reset-names = "esw";
 283
 284                 interrupt-parent = <&intc>;
 285                 interrupts = <17>;
 286         };
 287
 288         pcie@10140000 {
 289                 compatible = "mediatek,mt7620-pci";
 290                 reg = <0x10140000 0x100
 291                         0x10142000 0x100>;
 292
 293                 #address-cells = <3>;
 294                 #size-cells = <2>;
 295
 296                 resets = <&rstctrl 26>;
 297                 reset-names = "pcie0";
 298
 299                 interrupt-parent = <&cpuintc>;
 300                 interrupts = <4>;
 301
 302                 status = "disabled";
 303
 304                 device_type = "pci";
 305
 306                 bus-range = <0 255>;
 307                 ranges = <
 308                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 309                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 310                 >;
 311
 312                 pcie-bridge {
 313                         reg = <0x0000 0 0 0 0>;
 314
 315                         #address-cells = <3>;
 316                         #size-cells = <2>;
 317
 318                         device_type = "pci";
 319                 };
 320         };
 321
 322 };