4 compatible = "ralink,mtk7628an-soc";
8 compatible = "mips,mips24KEc";
14 #interrupt-cells = <1>;
16 compatible = "mti,cpu-interrupt-controller";
20 compatible = "palmbus";
21 reg = <0x10000000 0x200000>;
22 ranges = <0x0 0x10000000 0x1FFFFF>;
28 compatible = "ralink,mt7620a-sysc";
33 compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
36 resets = <&rstctrl 8>;
39 interrupt-parent = <&intc>;
44 compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
47 resets = <&rstctrl 9>;
51 #interrupt-cells = <1>;
53 interrupt-parent = <&cpuintc>;
56 ralink,intc-registers = <0x9c 0xa0
62 compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
65 resets = <&rstctrl 20>;
68 interrupt-parent = <&intc>;
76 compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
81 compatible = "mtk,mt7621-gpio-bank";
88 compatible = "mtk,mt7621-gpio-bank";
95 compatible = "mtk,mt7621-gpio-bank";
102 compatible = "ralink,mt7621-spi";
105 resets = <&rstctrl 18>;
108 #address-cells = <1>;
111 pinctrl-names = "default";
112 pinctrl-0 = <&spi_pins>;
118 compatible = "ns16550a";
125 resets = <&rstctrl 12>;
126 reset-names = "uartl";
128 interrupt-parent = <&intc>;
131 pinctrl-names = "default";
132 pinctrl-0 = <&uart0_pins>;
137 compatible = "ralink,rt2880-pinmux";
138 pinctrl-names = "default";
139 pinctrl-0 = <&state_default>;
140 state_default: pinctrl0 {
144 ralink,group = "spi";
145 ralink,function = "spi";
148 uart0_pins: uartlite {
150 ralink,group = "uart0";
151 ralink,function = "uart";
157 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
162 compatible = "ralink,mt7628an-usbphy", "ralink,mt7620a-usbphy";
164 resets = <&rstctrl 22>;
165 reset-names = "host";
169 compatible = "ralink,rt3xxx-ehci";
170 reg = <0x101c0000 0x1000>;
172 interrupt-parent = <&intc>;
177 compatible = "ralink,rt3xxx-ohci";
178 reg = <0x101c1000 0x1000>;
180 interrupt-parent = <&intc>;
185 compatible = "ralink,rt5350-eth";
186 reg = <0x10100000 10000>;
188 interrupt-parent = <&cpuintc>;
193 compatible = "ralink,rt3050-esw";
194 reg = <0x10110000 8000>;
196 interrupt-parent = <&intc>;
201 compatible = "mediatek,mt7620-pci";
202 reg = <0x10140000 0x100
205 #address-cells = <3>;
208 resets = <&rstctrl 26>;
209 reset-names = "pcie0";
211 interrupt-parent = <&cpuintc>;
220 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
221 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
225 reg = <0x0000 0 0 0 0>;
227 #address-cells = <3>;