ramips: add support for XiaoYu XY-C5
[oweals/openwrt.git] / target / linux / ramips / dts / mt7621_ubiquiti_edgerouterx.dtsi
1 #include "mt7621.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7         compatible = "ubiquiti,edgerouterx", "mediatek,mt7621-soc";
8
9         aliases {
10                 label-mac-device = &ethernet;
11         };
12
13         chosen {
14                 bootargs = "console=ttyS0,57600";
15         };
16
17         keys {
18                 compatible = "gpio-keys-polled";
19                 poll-interval = <20>;
20
21                 reset {
22                         label = "reset";
23                         gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
24                         linux,code = <KEY_RESTART>;
25                 };
26         };
27 };
28
29 &ethernet {
30         mtd-mac-address = <&factory 0x22>;
31 };
32
33 &nand {
34         status = "okay";
35
36         partitions {
37                 compatible = "fixed-partitions";
38                 #address-cells = <1>;
39                 #size-cells = <1>;
40
41                 partition@0 {
42                         label = "u-boot";
43                         reg = <0x0 0x80000>;
44                         read-only;
45                 };
46
47                 partition@80000 {
48                         label = "u-boot-env";
49                         reg = <0x80000 0x60000>;
50                         read-only;
51                 };
52
53                 factory: partition@e0000 {
54                         label = "factory";
55                         reg = <0xe0000 0x60000>;
56                 };
57
58                 partition@140000 {
59                         label = "kernel1";
60                         reg = <0x140000 0x300000>;
61                 };
62
63                 partition@440000 {
64                         label = "kernel2";
65                         reg = <0x440000 0x300000>;
66                 };
67
68                 partition@740000 {
69                         label = "ubi";
70                         reg = <0x740000 0xf7c0000>;
71                 };
72         };
73 };
74
75 &pinctrl {
76         state_default: pinctrl0 {
77                 gpio {
78                         ralink,group = "uart2", "uart3", "i2c", "pcie", "rgmii2", "jtag";
79                         ralink,function = "gpio";
80                 };
81         };
82 };
83
84 &spi0 {
85         /*
86          * This board has 2Mb spi flash soldered in and visible
87          * from manufacturer's firmware.
88          * But this SoC shares spi and nand pins,
89          * and current driver doesn't handle this sharing well
90          */
91         status = "disabled";
92
93         m25p80@1 {
94                 compatible = "jedec,spi-nor";
95                 reg = <1>;
96                 spi-max-frequency = <10000000>;
97
98                 partitions {
99                         compatible = "fixed-partitions";
100                         #address-cells = <1>;
101                         #size-cells = <1>;
102
103                         partition@0 {
104                                 label = "spi";
105                                 reg = <0x0 0x200000>;
106                                 read-only;
107                         };
108                 };
109         };
110 };
111
112 &xhci {
113         status = "disabled";
114 };