ramips/mt7621: Name DTS files based on scheme
[oweals/openwrt.git] / target / linux / ramips / dts / mt7621_mtc_wr1201.dts
1 /dts-v1/;
2
3 #include "mt7621.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9         compatible = "mtc,wr1201", "mediatek,mt7621-soc";
10         model = "MTC Wireless Router WR1201";
11
12         aliases {
13                 led-boot = &led_power;
14                 led-failsafe = &led_power;
15                 led-running = &led_power;
16                 led-upgrade = &led_power;
17         };
18
19         memory@0 {
20                 device_type = "memory";
21                 reg = <0x0 0x8000000>;
22         };
23
24         chosen {
25                 bootargs = "console=ttyS0,57600";
26         };
27
28         leds {
29                 compatible = "gpio-leds";
30
31                 led_power: power {
32                         label = "wr1201:green:power";
33                         gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
34                 };
35
36                 usb {
37                         label = "wr1201:green:usb";
38                         gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
39                         trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
40                         linux,default-trigger = "usbport";
41                 };
42
43                 eth_link {
44                         label = "wr1201:green:eth_link";
45                         gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
46                 };
47
48                 wps {
49                         label = "wr1201:green:wps";
50                         gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
51                 };
52         };
53
54         keys {
55                 compatible = "gpio-keys-polled";
56                 poll-interval = <20>;
57
58                 reset {
59                         label = "reset";
60                         gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
61                         linux,code = <KEY_RESTART>;
62                 };
63         };
64 };
65
66 &spi0 {
67         status = "okay";
68
69         flash@0 {
70                 compatible = "jedec,spi-nor";
71                 reg = <0>;
72                 spi-max-frequency = <10000000>;
73
74                 partitions {
75                         compatible = "fixed-partitions";
76                         #address-cells = <1>;
77                         #size-cells = <1>;
78
79                         partition@0 {
80                                 label = "Bootloader";
81                                 reg = <0x0 0x30000>;
82                                 read-only;
83                         };
84
85                         partition@30000 {
86                                 label = "Config";
87                                 reg = <0x30000 0x10000>;
88                                 read-only;
89                         };
90
91                         factory: partition@40000 {
92                                 label = "Factory";
93                                 reg = <0x40000 0x10000>;
94                                 read-only;
95                         };
96
97                         partition@50000 {
98                                 compatible = "denx,uimage";
99                                 label = "firmware";
100                                 reg = <0x50000 0xfa0000>;
101                         };
102
103                         partition@ff0000 {
104                                 label = "Second_Config";
105                                 reg = <0xff0000 0x10000>;
106                                 read-only;
107                         };
108                 };
109         };
110 };
111
112 &ethernet {
113         mtd-mac-address = <&factory 0x4>;
114 };
115
116 &sdhci {
117         status = "okay";
118 };
119
120 &pcie {
121         status = "okay";
122 };
123
124 &pcie0 {
125         wifi@0,0 {
126                 reg = <0x0000 0 0 0 0>;
127                 mediatek,mtd-eeprom = <&factory 0x8000>;
128                 ieee80211-freq-limit = <5000000 6000000>;
129
130                 led {
131                         led-sources = <2>;
132                         led-active-low;
133                 };
134         };
135 };
136
137 &pcie1 {
138         wifi@0,0 {
139                 reg = <0x0000 0 0 0 0>;
140                 mediatek,mtd-eeprom = <&factory 0x0000>;
141                 ieee80211-freq-limit = <2400000 2500000>;
142
143                 led {
144                         led-sources = <2>;
145                         led-active-low;
146                 };
147         };
148 };
149
150
151 &pinctrl {
152         state_default: pinctrl0 {
153                 gpio {
154                         ralink,group = "rgmii2";
155                         ralink,function = "gpio";
156                 };
157         };
158 };