ramips: fix switch setup for Xiaomi MiWiFi Nano
[oweals/openwrt.git] / target / linux / ramips / dts / mt7621_hiwifi_hc5962.dts
1 /dts-v1/;
2
3 #include "mt7621.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9         compatible = "hiwifi,hc5962", "mediatek,mt7621-soc";
10         model = "HiWiFi HC5962";
11
12         aliases {
13                 led-boot = &led_status;
14                 led-failsafe = &led_status;
15                 led-running = &led_status;
16                 led-upgrade = &led_status;
17         };
18
19         chosen {
20                 bootargs = "console=ttyS0,115200";
21         };
22
23         leds {
24                 compatible = "gpio-leds";
25
26                 led_status: status {
27                         label = "hc5962:white:status";
28                         gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
29                 };
30
31                 system {
32                         label = "hc5962:red:system";
33                         gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
34                 };
35         };
36
37         keys {
38                 compatible = "gpio-keys";
39
40                 reset {
41                         label = "reset";
42                         gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
43                         linux,code = <KEY_RESTART>;
44                 };
45         };
46 };
47
48 &nand {
49         status = "okay";
50
51         partitions {
52                 compatible = "fixed-partitions";
53                 #address-cells = <1>;
54                 #size-cells = <1>;
55
56                 partition@0 {
57                         label = "u-boot";
58                         reg = <0x0 0x80000>;
59                         read-only;
60                 };
61
62                 partition@80000 {
63                         label = "debug";
64                         reg = <0x80000 0x80000>;
65                         read-only;
66                 };
67
68                 factory: partition@100000 {
69                         label = "factory";
70                         reg = <0x100000 0x40000>;
71                         read-only;
72                 };
73
74                 partition@140000 {
75                         label = "kernel";
76                         reg = <0x140000 0x200000>;
77                 };
78
79                 partition@340000 {
80                         label = "ubi";
81                         reg = <0x340000 0x1E00000>;
82                 };
83
84                 partition@2140000 {
85                         label = "hw_panic";
86                         reg = <0x2140000 0x80000>;
87                         read-only;
88                 };
89
90                 partition@21c0000 {
91                         label = "bdinfo";
92                         reg = <0x21c0000 0x80000>;
93                         read-only;
94                 };
95
96                 partition@2240000 {
97                         label = "backup";
98                         reg = <0x2240000 0x80000>;
99                         read-only;
100                 };
101
102                 partition@22c0000 {
103                         label = "overly";
104                         reg = <0x22c0000 0x1000000>;
105                 };
106
107                 partition@32c0000 {
108                         label = "firmware_backup";
109                         reg = <0x32c0000 0x2000000>;
110                 };
111
112                 partition@52c0000 {
113                         label = "oem";
114                         reg = <0x52c0000 0x200000>;
115                 };
116
117                 partition@54c0000 {
118                         label = "opt";
119                         reg = <0x54c0000 0x2ac0000>;
120                 };
121         };
122 };
123
124 &pcie {
125         status = "okay";
126 };
127
128 &pcie0 {
129         mt76@0,0 {
130                 reg = <0x0000 0 0 0 0>;
131                 mediatek,mtd-eeprom = <&factory 0x0000>;
132                 ieee80211-freq-limit = <2400000 2500000>;
133         };
134 };
135
136 &pcie1 {
137         mt76@0,0 {
138                 reg = <0x0000 0 0 0 0>;
139                 mediatek,mtd-eeprom = <&factory 0x8000>;
140                 ieee80211-freq-limit = <5000000 6000000>;
141         };
142 };
143
144 &state_default {
145         gpio {
146                 ralink,group = "uart3", "jtag";
147                 ralink,function = "gpio";
148         };
149 };