target/linux/ramips/dts/mt7621_edimax_rg21s.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /dts-v1/;
   3
   4 #include "mt7621.dtsi"
   5
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/input/input.h>
   8
   9 / {
  10         compatible = "edimax,rg21s", "mediatek,mt7621-soc";
  11         model = "Edimax RG21S";
  12
  13         aliases {
  14                 led-boot = &led_power;
  15                 led-failsafe = &led_power;
  16                 led-running = &led_power;
  17                 led-upgrade = &led_power;
  18         };
  19
  20         chosen {
  21                 bootargs = "console=ttyS0,57600";
  22         };
  23
  24         keys {
  25                 compatible = "gpio-keys";
  26
  27                 reset {
  28                         label = "reset";
  29                         gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
  30                         linux,code = <KEY_RESTART>;
  31                 };
  32
  33                 wps {
  34                         label = "wps";
  35                         gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  36                         linux,code = <KEY_WPS_BUTTON>;
  37                 };
  38         };
  39
  40         leds {
  41                 compatible = "gpio-leds";
  42
  43                 led_power: led_1 {
  44                         label = "rg21s:red:led1";
  45                         gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
  46                 };
  47
  48                 led_2 {
  49                         label = "rg21s:red:led2";
  50                         gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
  51                 };
  52
  53                 led_3 {
  54                         label = "rg21s:red:led3";
  55                         gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
  56                 };
  57
  58                 led_4 {
  59                         label = "rg21s:red:led4";
  60                         gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
  61                 };
  62         };
  63 };
  64
  65 &spi0 {
  66         status = "okay";
  67
  68         flash@0 {
  69                 compatible = "jedec,spi-nor";
  70                 reg = <0>;
  71                 spi-max-frequency = <40000000>;
  72
  73                 partitions {
  74                         compatible = "fixed-partitions";
  75                         #address-cells = <1>;
  76                         #size-cells = <1>;
  77
  78                         partition@0 {
  79                                 label = "u-boot";
  80                                 reg = <0x0 0x30000>;
  81                                 read-only;
  82                         };
  83
  84                         partition@30000 {
  85                                 label = "u-boot-env";
  86                                 reg = <0x30000 0x10000>;
  87                                 read-only;
  88                         };
  89
  90                         factory: partition@40000 {
  91                                 label = "factory";
  92                                 reg = <0x40000 0x10000>;
  93                                 read-only;
  94                         };
  95
  96                         partition@50000 {
  97                                 compatible = "denx,uimage";
  98                                 label = "firmware";
  99                                 reg = <0x50000 0xfb0000>;
 100                         };
 101                 };
 102         };
 103 };
 104
 105 &pcie {
 106         status = "okay";
 107 };
 108
 109 &pcie0 {
 110         wifi0: wifi@0,0 {
 111                 compatible = "pci14c3,7615";
 112                 reg = <0x0000 0 0 0 0>;
 113                 mediatek,mtd-eeprom = <&factory 0x0000>;
 114                 ieee80211-freq-limit = <2400000 2500000>;
 115         };
 116 };
 117
 118 &pcie1 {
 119         wifi1: wifi@0,0 {
 120                 compatible = "pci14c3,7615";
 121                 reg = <0x0000 0 0 0 0>;
 122                 mediatek,mtd-eeprom = <&factory 0x8000>;
 123                 ieee80211-freq-limit = <5000000 6000000>;
 124         };
 125 };
 126
 127 &ethernet {
 128         mediatek,portmap = "wllll";
 129         port@5 {
 130                 status = "disabled";
 131         };
 132 };
 133
 134 &pinctrl {
 135         state_default: pinctrl0 {
 136                 gpio {
 137                         ralink,group = "wdt", "rgmii2", "jtag", "mdio";
 138                         ralink,function = "gpio";
 139                 };
 140         };
 141 };
 142
 143 &xhci {
 144         status = "disabled";
 145 };