ramips: remove redundant mtd-mac-address for WiFi
[oweals/openwrt.git] / target / linux / ramips / dts / mt7621_asus_rt-acx5p.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include "mt7621.dtsi"
5
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8
9 / {
10         aliases {
11                 led-boot = &led_power;
12                 led-failsafe = &led_power;
13                 led-running = &led_power;
14                 led-upgrade = &led_power;
15         };
16
17         chosen {
18                 bootargs = "console=ttyS0,57600";
19         };
20
21         palmbus: palmbus@1E000000 {
22                 i2c@900 {
23                         status = "okay";
24                 };
25         };
26
27         keys {
28                 compatible = "gpio-keys";
29
30                 reset {
31                         label = "reset";
32                         gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
33                         linux,code = <KEY_RESTART>;
34                 };
35
36                 wps {
37                         label = "wps";
38                         gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
39                         linux,code = <KEY_WPS_BUTTON>;
40                 };
41         };
42
43         leds {
44                 compatible = "gpio-leds";
45
46                 led_power: power {
47                         label = "rt-ac85p:blue:power";
48                         gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
49                         linux,default-trigger = "phy0tpt";
50                 };
51                 wlan2g {
52                         label = "rt-ac85p:blue:wlan2g";
53                         gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
54                         linux,default-trigger = "phy0radio";
55                 };
56
57                 wlan5g {
58                         label = "rt-ac85p:blue:wlan5g";
59                         gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
60                         linux,default-trigger = "phy1radio";
61                 };
62         };
63 };
64
65 &sdhci {
66         status = "okay";
67 };
68
69 &nand {
70         status = "okay";
71
72         partitions {
73                 compatible = "fixed-partitions";
74                 #address-cells = <1>;
75                 #size-cells = <1>;
76
77                 partition@0 {
78                         label = "u-boot";
79                         reg = <0x0 0xe0000>;
80                         read-only;
81                 };
82
83                 partition@e0000 {
84                         label = "u-boot-env";
85                         reg = <0xe0000 0x100000>;
86                         read-only;
87                 };
88
89                 factory: partition@1e0000 {
90                         label = "factory";
91                         reg = <0x1e0000 0x100000>;
92                         read-only;
93                 };
94
95                 factory2: partition@2e0000 {
96                         label = "factory2";
97                         reg = <0x2e0000 0x100000>;
98                         read-only;
99                 };
100
101                 partition@3e0000 {
102                         label = "kernel";
103                         reg = <0x3e0000 0x400000>;
104                 };
105
106                 partition@7e0000 {
107                         label = "ubi";
108                         reg = <0x7e0000 0x2e00000>;
109                 };
110
111                 partition@35e0000 {
112                         label = "firmware2";
113                         reg = <0x35e0000 0x3200000>;
114                 };
115         };
116 };
117
118 &pcie {
119         status = "okay";
120 };
121
122 &pcie0 {
123         wifi0: wifi@0,0 {
124                 compatible = "pci14c3,7615";
125                 reg = <0x0000 0 0 0 0>;
126                 mediatek,mtd-eeprom = <&factory 0x0000>;
127                 ieee80211-freq-limit = <2400000 2500000>;
128         };
129 };
130
131 &pcie1 {
132         wifi1: wifi@0,0 {
133                 compatible = "pci14c3,7615";
134                 reg = <0x0000 0 0 0 0>;
135                 mediatek,mtd-eeprom = <&factory 0x8000>;
136                 ieee80211-freq-limit = <5000000 6000000>;
137         };
138 };
139
140 &ethernet {
141         mtd-mac-address = <&factory 0xe000>;
142         mediatek,portmap = "wllll";
143         port@5 {
144                 status = "disabled";
145         };
146 };
147
148 &i2c {
149         status = "disabled";
150 };
151
152 &pinctrl {
153         state_default: pinctrl0 {
154                 gpio {
155                         ralink,group = "uart2", "uart3", "i2c";
156                         ralink,function = "gpio";
157                 };
158         };
159 };