4 compatible = "ralink,mt7620n-soc";
11 compatible = "mips,mips24KEc";
17 bootargs = "console=ttyS0,57600";
22 #interrupt-cells = <1>;
24 compatible = "mti,cpu-interrupt-controller";
33 palmbus: palmbus@10000000 {
34 compatible = "palmbus";
35 reg = <0x10000000 0x200000>;
36 ranges = <0x0 0x10000000 0x1FFFFF>;
42 compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc", "syscon";
47 compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
50 interrupt-parent = <&intc>;
54 watchdog: watchdog@120 {
55 compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
58 resets = <&rstctrl 8>;
61 interrupt-parent = <&intc>;
66 compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
69 resets = <&rstctrl 19>;
73 #interrupt-cells = <1>;
75 interrupt-parent = <&cpuintc>;
80 compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
83 resets = <&rstctrl 20>;
86 interrupt-parent = <&intc>;
91 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
94 resets = <&rstctrl 13>;
97 interrupt-parent = <&intc>;
103 ralink,gpio-base = <0>;
104 ralink,nr-gpio = <24>;
105 ralink,register-map = [ 00 04 08 0c
111 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
114 interrupt-parent = <&intc>;
120 ralink,gpio-base = <24>;
121 ralink,nr-gpio = <16>;
122 ralink,register-map = [ 00 04 08 0c
130 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
133 interrupt-parent = <&intc>;
139 ralink,gpio-base = <40>;
140 ralink,nr-gpio = <32>;
141 ralink,register-map = [ 00 04 08 0c
149 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
152 interrupt-parent = <&intc>;
158 ralink,gpio-base = <72>;
159 ralink,nr-gpio = <1>;
160 ralink,register-map = [ 00 04 08 0c
168 compatible = "ralink,rt2880-i2c";
171 resets = <&rstctrl 16>;
174 #address-cells = <1>;
179 pinctrl-names = "default";
180 pinctrl-0 = <&i2c_pins>;
184 compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
187 resets = <&rstctrl 18>;
190 #address-cells = <1>;
195 pinctrl-names = "default";
196 pinctrl-0 = <&spi_pins>;
200 compatible = "ralink,rt2880-spi";
203 resets = <&rstctrl 18>;
206 #address-cells = <1>;
211 pinctrl-names = "default";
212 pinctrl-0 = <&spi_cs1>;
215 uartlite: uartlite@c00 {
216 compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
219 resets = <&rstctrl 19>;
220 reset-names = "uartl";
222 interrupt-parent = <&intc>;
227 pinctrl-names = "default";
228 pinctrl-0 = <&uartlite_pins>;
231 systick: systick@d00 {
232 compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
235 resets = <&rstctrl 28>;
236 reset-names = "intc";
238 interrupt-parent = <&cpuintc>;
244 compatible = "ralink,rt2880-pinmux";
245 pinctrl-names = "default";
246 pinctrl-0 = <&state_default>;
248 state_default: pinctrl0 {
253 ralink,group = "ephy";
254 ralink,function = "ephy";
260 ralink,group = "spi";
261 ralink,function = "spi";
267 ralink,group = "spi refclk";
268 ralink,function = "spi refclk";
274 ralink,group = "i2c";
275 ralink,function = "i2c";
279 uartlite_pins: uartlite {
281 ralink,group = "uartlite";
282 ralink,function = "uartlite";
288 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
293 compatible = "ralink,rt2880-clock";
298 compatible = "mediatek,mt7620-usbphy";
301 ralink,sysctl = <&sysc>;
302 resets = <&rstctrl 22 &rstctrl 25>;
303 reset-names = "host", "device";
305 clocks = <&clkctrl 22 &clkctrl 25>;
306 clock-names = "host", "device";
309 ethernet: ethernet@10100000 {
310 compatible = "mediatek,mt7620-eth";
311 reg = <0x10100000 0x10000>;
313 #address-cells = <1>;
316 interrupt-parent = <&cpuintc>;
319 resets = <&rstctrl 21 &rstctrl 23>;
320 reset-names = "fe", "esw";
322 mediatek,switch = <&gsw>;
325 #address-cells = <1>;
332 compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
340 compatible = "mediatek,mt7620-gsw";
341 reg = <0x10110000 0x8000>;
343 resets = <&rstctrl 23>;
346 interrupt-parent = <&intc>;
348 mediatek,port4 = "ephy";
351 ehci: ehci@101c0000 {
352 #address-cells = <1>;
354 compatible = "generic-ehci";
355 reg = <0x101c0000 0x1000>;
357 interrupt-parent = <&intc>;
367 #trigger-source-cells = <0>;
371 ohci: ohci@101c1000 {
372 #address-cells = <1>;
374 compatible = "generic-ohci";
375 reg = <0x101c1000 0x1000>;
380 interrupt-parent = <&intc>;
387 #trigger-source-cells = <0>;
391 wmac: wmac@10180000 {
392 compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
393 reg = <0x10180000 0x40000>;
395 interrupt-parent = <&cpuintc>;
398 ralink,eeprom = "soc_wmac.eeprom";