ramips: fix MAC address setup for Xiaomi MiWiFi Nano
[oweals/openwrt.git] / target / linux / ramips / dts / mt7620n.dtsi
1 / {
2         #address-cells = <1>;
3         #size-cells = <1>;
4         compatible = "ralink,mt7620n-soc";
5
6         cpus {
7                 #address-cells = <1>;
8                 #size-cells = <0>;
9
10                 cpu@0 {
11                         compatible = "mips,mips24KEc";
12                         reg = <0>;
13                 };
14         };
15
16         chosen {
17                 bootargs = "console=ttyS0,57600";
18         };
19
20         cpuintc: cpuintc {
21                 #address-cells = <0>;
22                 #interrupt-cells = <1>;
23                 interrupt-controller;
24                 compatible = "mti,cpu-interrupt-controller";
25         };
26
27         aliases {
28                 spi0 = &spi0;
29                 spi1 = &spi1;
30                 serial0 = &uartlite;
31         };
32
33         palmbus: palmbus@10000000 {
34                 compatible = "palmbus";
35                 reg = <0x10000000 0x200000>;
36                 ranges = <0x0 0x10000000 0x1FFFFF>;
37
38                 #address-cells = <1>;
39                 #size-cells = <1>;
40
41                 sysc: sysc@0 {
42                         compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc", "syscon";
43                         reg = <0x0 0x100>;
44                 };
45
46                 timer: timer@100 {
47                         compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
48                         reg = <0x100 0x20>;
49
50                         interrupt-parent = <&intc>;
51                         interrupts = <1>;
52                 };
53
54                 watchdog: watchdog@120 {
55                         compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
56                         reg = <0x120 0x10>;
57
58                         resets = <&rstctrl 8>;
59                         reset-names = "wdt";
60
61                         interrupt-parent = <&intc>;
62                         interrupts = <1>;
63                 };
64
65                 intc: intc@200 {
66                         compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
67                         reg = <0x200 0x100>;
68
69                         resets = <&rstctrl 19>;
70                         reset-names = "intc";
71
72                         interrupt-controller;
73                         #interrupt-cells = <1>;
74
75                         interrupt-parent = <&cpuintc>;
76                         interrupts = <2>;
77                 };
78
79                 memc: memc@300 {
80                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
81                         reg = <0x300 0x100>;
82
83                         resets = <&rstctrl 20>;
84                         reset-names = "mc";
85
86                         interrupt-parent = <&intc>;
87                         interrupts = <3>;
88                 };
89
90                 gpio0: gpio@600 {
91                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
92                         reg = <0x600 0x34>;
93
94                         resets = <&rstctrl 13>;
95                         reset-names = "pio";
96
97                         interrupt-parent = <&intc>;
98                         interrupts = <6>;
99
100                         gpio-controller;
101                         #gpio-cells = <2>;
102
103                         ralink,gpio-base = <0>;
104                         ralink,nr-gpio = <24>;
105                         ralink,register-map = [ 00 04 08 0c
106                                                 20 24 28 2c
107                                                 30 34 ];
108                 };
109
110                 gpio1: gpio@638 {
111                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
112                         reg = <0x638 0x24>;
113
114                         interrupt-parent = <&intc>;
115                         interrupts = <6>;
116
117                         gpio-controller;
118                         #gpio-cells = <2>;
119
120                         ralink,gpio-base = <24>;
121                         ralink,nr-gpio = <16>;
122                         ralink,register-map = [ 00 04 08 0c
123                                                 10 14 18 1c
124                                                 20 24 ];
125
126                         status = "disabled";
127                 };
128
129                 gpio2: gpio@660 {
130                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
131                         reg = <0x660 0x24>;
132
133                         interrupt-parent = <&intc>;
134                         interrupts = <6>;
135
136                         gpio-controller;
137                         #gpio-cells = <2>;
138
139                         ralink,gpio-base = <40>;
140                         ralink,nr-gpio = <32>;
141                         ralink,register-map = [ 00 04 08 0c
142                                                 10 14 18 1c
143                                                 20 24 ];
144
145                         status = "disabled";
146                 };
147
148                 gpio3: gpio@688 {
149                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
150                         reg = <0x688 0x24>;
151
152                         interrupt-parent = <&intc>;
153                         interrupts = <6>;
154
155                         gpio-controller;
156                         #gpio-cells = <2>;
157
158                         ralink,gpio-base = <72>;
159                         ralink,nr-gpio = <1>;
160                         ralink,register-map = [ 00 04 08 0c
161                                                 10 14 18 1c
162                                                 20 24 ];
163
164                         status = "disabled";
165                 };
166
167                 i2c: i2c@900 {
168                         compatible = "ralink,rt2880-i2c";
169                         reg = <0x900 0x100>;
170
171                         resets = <&rstctrl 16>;
172                         reset-names = "i2c";
173
174                         #address-cells = <1>;
175                         #size-cells = <0>;
176
177                         status = "disabled";
178
179                         pinctrl-names = "default";
180                         pinctrl-0 = <&i2c_pins>;
181                 };
182
183                 spi0: spi@b00 {
184                         compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
185                         reg = <0xb00 0x40>;
186
187                         resets = <&rstctrl 18>;
188                         reset-names = "spi";
189
190                         #address-cells = <1>;
191                         #size-cells = <0>;
192
193                         status = "disabled";
194
195                         pinctrl-names = "default";
196                         pinctrl-0 = <&spi_pins>;
197                 };
198
199                 spi1: spi@b40 {
200                         compatible = "ralink,rt2880-spi";
201                         reg = <0xb40 0x60>;
202
203                         resets = <&rstctrl 18>;
204                         reset-names = "spi";
205
206                         #address-cells = <1>;
207                         #size-cells = <0>;
208
209                         status = "disabled";
210
211                         pinctrl-names = "default";
212                         pinctrl-0 = <&spi_cs1>;
213                 };
214
215                 uartlite: uartlite@c00 {
216                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
217                         reg = <0xc00 0x100>;
218
219                         resets = <&rstctrl 19>;
220                         reset-names = "uartl";
221
222                         interrupt-parent = <&intc>;
223                         interrupts = <12>;
224
225                         reg-shift = <2>;
226
227                         pinctrl-names = "default";
228                         pinctrl-0 = <&uartlite_pins>;
229                 };
230
231                 systick: systick@d00 {
232                         compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
233                         reg = <0xd00 0x10>;
234
235                         resets = <&rstctrl 28>;
236                         reset-names = "intc";
237
238                         interrupt-parent = <&cpuintc>;
239                         interrupts = <7>;
240                 };
241         };
242
243         pinctrl: pinctrl {
244                 compatible = "ralink,rt2880-pinmux";
245                 pinctrl-names = "default";
246                 pinctrl-0 = <&state_default>;
247
248                 state_default: pinctrl0 {
249                 };
250
251                 ephy_pins: ephy {
252                         ephy {
253                                 ralink,group = "ephy";
254                                 ralink,function = "ephy";
255                         };
256                 };
257
258                 spi_pins: spi_pins {
259                         spi_pins {
260                                 ralink,group = "spi";
261                                 ralink,function = "spi";
262                         };
263                 };
264
265                 spi_cs1: spi1 {
266                         spi1 {
267                                 ralink,group = "spi refclk";
268                                 ralink,function = "spi refclk";
269                         };
270                 };
271
272                 i2c_pins: i2c_pins {
273                         i2c_pins {
274                                 ralink,group = "i2c";
275                                 ralink,function = "i2c";
276                         };
277                 };
278
279                 uartlite_pins: uartlite {
280                         uart {
281                                 ralink,group = "uartlite";
282                                 ralink,function = "uartlite";
283                         };
284                 };
285         };
286
287         rstctrl: rstctrl {
288                 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
289                 #reset-cells = <1>;
290         };
291
292         clkctrl: clkctrl {
293                 compatible = "ralink,rt2880-clock";
294                 #clock-cells = <1>;
295         };
296
297         usbphy: usbphy {
298                 compatible = "mediatek,mt7620-usbphy";
299                 #phy-cells = <0>;
300
301                 ralink,sysctl = <&sysc>;
302                 resets = <&rstctrl 22 &rstctrl 25>;
303                 reset-names = "host", "device";
304
305                 clocks = <&clkctrl 22 &clkctrl 25>;
306                 clock-names = "host", "device";
307         };
308
309         ethernet: ethernet@10100000 {
310                 compatible = "mediatek,mt7620-eth";
311                 reg = <0x10100000 0x10000>;
312
313                 #address-cells = <1>;
314                 #size-cells = <0>;
315
316                 interrupt-parent = <&cpuintc>;
317                 interrupts = <5>;
318
319                 resets = <&rstctrl 21 &rstctrl 23>;
320                 reset-names = "fe", "esw";
321
322                 mediatek,switch = <&gsw>;
323
324                 mdio-bus {
325                         #address-cells = <1>;
326                         #size-cells = <0>;
327
328                         status = "disabled";
329                 };
330
331                 port@4 {
332                         compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
333                         reg = <4>;
334
335                         status = "disabled";
336                 };
337         };
338
339         gsw: gsw@10110000 {
340                 compatible = "mediatek,mt7620-gsw";
341                 reg = <0x10110000 0x8000>;
342
343                 resets = <&rstctrl 23>;
344                 reset-names = "esw";
345
346                 interrupt-parent = <&intc>;
347                 interrupts = <17>;
348                 mediatek,port4 = "ephy";
349         };
350
351         ehci: ehci@101c0000 {
352                 #address-cells = <1>;
353                 #size-cells = <0>;
354                 compatible = "generic-ehci";
355                 reg = <0x101c0000 0x1000>;
356
357                 interrupt-parent = <&intc>;
358                 interrupts = <18>;
359
360                 phys = <&usbphy>;
361                 phy-names = "usb";
362
363                 status = "disabled";
364
365                 ehci_port1: port@1 {
366                         reg = <1>;
367                         #trigger-source-cells = <0>;
368                 };
369         };
370
371         ohci: ohci@101c1000 {
372                 #address-cells = <1>;
373                 #size-cells = <0>;
374                 compatible = "generic-ohci";
375                 reg = <0x101c1000 0x1000>;
376
377                 phys = <&usbphy>;
378                 phy-names = "usb";
379
380                 interrupt-parent = <&intc>;
381                 interrupts = <18>;
382
383                 status = "disabled";
384
385                 ohci_port1: port@1 {
386                         reg = <1>;
387                         #trigger-source-cells = <0>;
388                 };
389         };
390
391         wmac: wmac@10180000 {
392                 compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
393                 reg = <0x10180000 0x40000>;
394
395                 interrupt-parent = <&cpuintc>;
396                 interrupts = <6>;
397
398                 ralink,eeprom = "soc_wmac.eeprom";
399         };
400 };