target/linux/ramips/dts/mt7620a_phicomm_psg1218.dtsi

   1 #include "mt7620a.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5
   6 / {
   7         compatible = "phicomm,psg1218", "ralink,mt7620a-soc";
   8
   9         keys {
  10                 compatible = "gpio-keys";
  11
  12                 reset {
  13                         label = "reset";
  14                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  15                         linux,code = <KEY_RESTART>;
  16                 };
  17         };
  18 };
  19
  20 &gpio0 {
  21         status = "okay";
  22 };
  23
  24 &spi0 {
  25         status = "okay";
  26
  27         m25p80@0 {
  28                 compatible = "jedec,spi-nor";
  29                 reg = <0>;
  30                 spi-max-frequency = <10000000>;
  31
  32                 partitions {
  33                         compatible = "fixed-partitions";
  34                         #address-cells = <1>;
  35                         #size-cells = <1>;
  36
  37                         partition@0 {
  38                                 label = "u-boot";
  39                                 reg = <0x0 0x30000>;
  40                                 read-only;
  41                         };
  42
  43                         partition@20000 {
  44                                 label = "u-boot-env";
  45                                 reg = <0x30000 0x10000>;
  46                                 read-only;
  47                         };
  48
  49                         factory: partition@30000 {
  50                                 label = "factory";
  51                                 reg = <0x40000 0x10000>;
  52                                 read-only;
  53                         };
  54
  55                         partition@40000 {
  56                                 compatible = "denx,uimage";
  57                                 label = "firmware";
  58                                 reg = <0x50000 0x7b0000>;
  59                         };
  60                 };
  61         };
  62 };
  63
  64 &pcie {
  65         status = "okay";
  66 };
  67
  68 &pcie0 {
  69         mt76@0,0 {
  70                 reg = <0x0000 0 0 0 0>;
  71                 mediatek,mtd-eeprom = <&factory 0x8000>;
  72                 ieee80211-freq-limit = <5000000 6000000>;
  73         };
  74 };
  75
  76 &wmac {
  77         ralink,mtd-eeprom = <&factory 0>;
  78 };