target/linux/ramips/dts/mt7620a_phicomm_psg1218.dtsi

   1 #include "mt7620a.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5
   6 / {
   7         compatible = "phicomm,psg1218", "ralink,mt7620a-soc";
   8
   9         keys {
  10                 compatible = "gpio-keys-polled";
  11                 poll-interval = <20>;
  12
  13                 reset {
  14                         label = "reset";
  15                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  16                         linux,code = <KEY_RESTART>;
  17                 };
  18         };
  19 };
  20
  21 &gpio0 {
  22         status = "okay";
  23 };
  24
  25 &spi0 {
  26         status = "okay";
  27
  28         m25p80@0 {
  29                 compatible = "jedec,spi-nor";
  30                 reg = <0>;
  31                 spi-max-frequency = <10000000>;
  32
  33                 partitions {
  34                         compatible = "fixed-partitions";
  35                         #address-cells = <1>;
  36                         #size-cells = <1>;
  37
  38                         partition@0 {
  39                                 label = "u-boot";
  40                                 reg = <0x0 0x30000>;
  41                                 read-only;
  42                         };
  43
  44                         partition@20000 {
  45                                 label = "u-boot-env";
  46                                 reg = <0x30000 0x10000>;
  47                                 read-only;
  48                         };
  49
  50                         factory: partition@30000 {
  51                                 label = "factory";
  52                                 reg = <0x40000 0x10000>;
  53                                 read-only;
  54                         };
  55
  56                         partition@40000 {
  57                                 compatible = "denx,uimage";
  58                                 label = "firmware";
  59                                 reg = <0x50000 0x7b0000>;
  60                         };
  61                 };
  62         };
  63 };
  64
  65 &pcie {
  66         status = "okay";
  67 };
  68
  69 &pcie0 {
  70         mt76@0,0 {
  71                 reg = <0x0000 0 0 0 0>;
  72                 mediatek,mtd-eeprom = <&factory 0x8000>;
  73                 ieee80211-freq-limit = <5000000 6000000>;
  74         };
  75 };
  76
  77 &wmac {
  78         ralink,mtd-eeprom = <&factory 0>;
  79 };