target/linux/ramips/dts/mt7620a_phicomm_psg1208.dts

   1 /dts-v1/;
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "phicomm,psg1208", "ralink,mt7620a-soc";
  10         model = "Phicomm PSG1208";
  11
  12         aliases {
  13                 led-boot = &led_wps;
  14                 led-failsafe = &led_wps;
  15                 led-running = &led_wps;
  16                 led-upgrade = &led_wps;
  17         };
  18
  19         leds {
  20                 compatible = "gpio-leds";
  21
  22                 led_wps: wps {
  23                         label = "psg1208:white:wps";
  24                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  25                 };
  26
  27                 wlan {
  28                         label = "psg1208:white:wlan2g";
  29                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  30                 };
  31         };
  32
  33         keys {
  34                 compatible = "gpio-keys-polled";
  35                 poll-interval = <20>;
  36
  37                 reset {
  38                         label = "reset";
  39                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  40                         linux,code = <KEY_RESTART>;
  41                 };
  42         };
  43 };
  44
  45 &gpio1 {
  46         status = "okay";
  47 };
  48
  49 &gpio3 {
  50         status = "okay";
  51 };
  52
  53 &spi0 {
  54         status = "okay";
  55
  56         m25p80@0 {
  57                 compatible = "jedec,spi-nor";
  58                 reg = <0>;
  59                 spi-max-frequency = <10000000>;
  60
  61                 partitions {
  62                         compatible = "fixed-partitions";
  63                         #address-cells = <1>;
  64                         #size-cells = <1>;
  65
  66                         partition@0 {
  67                                 label = "u-boot";
  68                                 reg = <0x0 0x30000>;
  69                                 read-only;
  70                         };
  71
  72                         partition@20000 {
  73                                 label = "u-boot-env";
  74                                 reg = <0x30000 0x10000>;
  75                                 read-only;
  76                         };
  77
  78                         factory: partition@30000 {
  79                                 label = "factory";
  80                                 reg = <0x40000 0x10000>;
  81                                 read-only;
  82                         };
  83
  84                         partition@40000 {
  85                                 compatible = "denx,uimage";
  86                                 label = "firmware";
  87                                 reg = <0x50000 0x7b0000>;
  88                         };
  89                 };
  90         };
  91 };
  92
  93 &pinctrl {
  94         state_default: pinctrl0 {
  95                 gpio {
  96                         ralink,group = "i2c", "spi refclk", "wled";
  97                         ralink,function = "gpio";
  98                 };
  99         };
 100 };
 101
 102 &ethernet {
 103         pinctrl-names = "default";
 104         pinctrl-0 = <&ephy_pins>;
 105         mtd-mac-address = <&factory 0x4>;
 106         mediatek,portmap = "llllw";
 107 };
 108
 109 &pcie {
 110         status = "okay";
 111 };
 112
 113 &pcie0 {
 114         mt76@0,0 {
 115                 reg = <0x0000 0 0 0 0>;
 116                 mediatek,mtd-eeprom = <&factory 0x8000>;
 117                 ieee80211-freq-limit = <5000000 6000000>;
 118         };
 119 };
 120
 121 &wmac {
 122         ralink,mtd-eeprom = <&factory 0>;
 123 };