target/linux/ramips/dts/mt7620a_phicomm_k2g.dts

   1 /dts-v1/;
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "phicomm,k2g", "ralink,mt7620a-soc";
  10         model = "Phicomm K2G";
  11
  12         aliases {
  13                 led-boot = &led_blue;
  14                 led-failsafe = &led_blue;
  15                 led-running = &led_blue;
  16                 led-upgrade = &led_blue;
  17                 serial0 = &uartlite;
  18         };
  19
  20         leds {
  21                 compatible = "gpio-leds";
  22
  23                 led_blue: blue {
  24                         label = "k2g:blue:status";
  25                         gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
  26                 };
  27
  28                 yellow {
  29                         label = "k2g:yellow:status";
  30                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  31                 };
  32
  33                 red {
  34                         label = "k2g:red:status";
  35                         gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
  36                 };
  37         };
  38
  39         keys {
  40                 compatible = "gpio-keys";
  41
  42                 reset {
  43                         label = "reset";
  44                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  45                         linux,code = <KEY_RESTART>;
  46                 };
  47         };
  48 };
  49
  50 &spi0 {
  51         status = "okay";
  52
  53         m25p80@0 {
  54                 compatible = "jedec,spi-nor";
  55                 reg = <0>;
  56                 spi-max-frequency = <24000000>;
  57
  58                 partitions {
  59                         compatible = "fixed-partitions";
  60                         #address-cells = <1>;
  61                         #size-cells = <1>;
  62
  63                         partition@0 {
  64                                 reg = <0x0 0x30000>;
  65                                 label = "u-boot";
  66                                 read-only;
  67                         };
  68
  69                         partition@30000 {
  70                                 reg = <0x30000 0x10000>;
  71                                 label = "u-boot-env";
  72                                 read-only;
  73                         };
  74
  75                         factory: partition@40000 {
  76                                 reg = <0x40000 0x10000>;
  77                                 label = "factory";
  78                                 read-only;
  79                         };
  80
  81                         partition@50000 {
  82                                 reg = <0x50000 0x50000>;
  83                                 label = "permanent_config";
  84                                 read-only;
  85                         };
  86
  87                         partition@a0000 {
  88                                 compatible = "denx,uimage";
  89                                 reg = <0xa0000 0x760000>;
  90                                 label = "firmware";
  91                         };
  92                 };
  93         };
  94 };
  95
  96 &state_default {
  97         gpio {
  98                 ralink,group = "i2c", "uartf";
  99                 ralink,function = "gpio";
 100         };
 101 };
 102
 103 &ethernet {
 104         pinctrl-names = "default";
 105         pinctrl-0 = <&rgmii2_pins &mdio_pins>;
 106         mtd-mac-address = <&factory 0x28>;
 107         mediatek,portmap = "llllw";
 108
 109         port@5 {
 110                 status = "okay";
 111                 phy-handle = <&phy5>;
 112                 phy-mode = "rgmii";
 113         };
 114
 115         mdio-bus {
 116                 status = "okay";
 117
 118                 phy5: ethernet-phy@5 {
 119                         reg = <5>;
 120                         phy-mode = "rgmii";
 121                 };
 122         };
 123 };
 124
 125 &pcie {
 126         status = "okay";
 127 };
 128
 129 &pcie0 {
 130         mt76@0,0 {
 131                 reg = <0x0000 0 0 0 0>;
 132                 mediatek,mtd-eeprom = <&factory 0x8000>;
 133                 ieee80211-freq-limit = <5000000 6000000>;
 134         };
 135 };
 136
 137 &wmac {
 138         ralink,mtd-eeprom = <&factory 0>;
 139         pinctrl-names = "default";
 140         pinctrl-0 = <&pa_pins>;
 141 };