ramips: clean and improve MAC address setup in 02_network
[oweals/openwrt.git] / target / linux / ramips / dts / mt7620a_phicomm_k2g.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9         compatible = "phicomm,k2g", "ralink,mt7620a-soc";
10         model = "Phicomm K2G";
11
12         aliases {
13                 led-boot = &led_blue;
14                 led-failsafe = &led_blue;
15                 led-running = &led_blue;
16                 led-upgrade = &led_blue;
17                 serial0 = &uartlite;
18         };
19
20         leds {
21                 compatible = "gpio-leds";
22
23                 led_blue: blue {
24                         label = "k2g:blue:status";
25                         gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
26                 };
27
28                 yellow {
29                         label = "k2g:yellow:status";
30                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
31                 };
32
33                 red {
34                         label = "k2g:red:status";
35                         gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
36                 };
37         };
38
39         keys {
40                 compatible = "gpio-keys-polled";
41                 poll-interval = <20>;
42
43                 reset {
44                         label = "reset";
45                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
46                         linux,code = <KEY_RESTART>;
47                 };
48         };
49 };
50
51 &spi0 {
52         status = "okay";
53
54         m25p80@0 {
55                 compatible = "jedec,spi-nor";
56                 reg = <0>;
57                 spi-max-frequency = <24000000>;
58
59                 partitions {
60                         compatible = "fixed-partitions";
61                         #address-cells = <1>;
62                         #size-cells = <1>;
63
64                         partition@0 {
65                                 reg = <0x0 0x30000>;
66                                 label = "u-boot";
67                                 read-only;
68                         };
69
70                         partition@30000 {
71                                 reg = <0x30000 0x10000>;
72                                 label = "u-boot-env";
73                                 read-only;
74                         };
75
76                         factory: partition@40000 {
77                                 reg = <0x40000 0x10000>;
78                                 label = "factory";
79                                 read-only;
80                         };
81
82                         partition@50000 {
83                                 reg = <0x50000 0x50000>;
84                                 label = "permanent_config";
85                                 read-only;
86                         };
87
88                         partition@a0000 {
89                                 compatible = "denx,uimage";
90                                 reg = <0xa0000 0x760000>;
91                                 label = "firmware";
92                         };
93                 };
94         };
95 };
96
97 &pinctrl {
98         state_default: pinctrl0 {
99                 gpio {
100                         ralink,group = "i2c", "uartf";
101                         ralink,function = "gpio";
102                 };
103         };
104 };
105
106 &ethernet {
107         pinctrl-names = "default";
108         pinctrl-0 = <&rgmii2_pins &mdio_pins>;
109         mtd-mac-address = <&factory 0x28>;
110         mediatek,portmap = "llllw";
111
112         port@5 {
113                 status = "okay";
114                 phy-handle = <&phy5>;
115                 phy-mode = "rgmii";
116         };
117
118         mdio-bus {
119                 status = "okay";
120
121                 phy5: ethernet-phy@5 {
122                         reg = <5>;
123                         phy-mode = "rgmii";
124                 };
125         };
126 };
127
128 &pcie {
129         status = "okay";
130 };
131
132 &pcie0 {
133         mt76@0,0 {
134                 reg = <0x0000 0 0 0 0>;
135                 mediatek,mtd-eeprom = <&factory 0x8000>;
136                 ieee80211-freq-limit = <5000000 6000000>;
137         };
138 };
139
140 &wmac {
141         ralink,mtd-eeprom = <&factory 0>;
142         pinctrl-names = "default";
143         pinctrl-0 = <&pa_pins>;
144 };