target/linux/ramips/dts/mt7620a_lava_lr-25g001.dts

   1 /dts-v1/;
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "lava,lr-25g001", "ralink,mt7620a-soc";
  10         model = "LAVA LR-25G001";
  11
  12         aliases {
  13                 led-boot = &led_status;
  14                 led-failsafe = &led_status;
  15                 led-running = &led_status;
  16                 led-upgrade = &led_status;
  17         };
  18
  19         keys {
  20                 compatible = "gpio-keys";
  21
  22                 wps {
  23                         label = "wps";
  24                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  25                         linux,code = <KEY_WPS_BUTTON>;
  26                 };
  27
  28                 reset {
  29                         label = "reset";
  30                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  31                         linux,code = <KEY_RESTART>;
  32                 };
  33         };
  34
  35         leds {
  36                 compatible = "gpio-leds";
  37
  38                 led_status: status {
  39                         label = "lr-25g001:green:status";
  40                         gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  41                 };
  42
  43                 wifi2g {
  44                         label = "lr-25g001:green:wifi2g";
  45                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  46                 };
  47
  48                 wifi5g {
  49                         label = "lr-25g001:green:wifi5g";
  50                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  51                 };
  52         };
  53
  54         gpio_export {
  55                 compatible = "gpio-export";
  56                 #size-cells = <0>;
  57
  58                 usbpower {
  59                         gpio-export,name = "usbpower";
  60                         gpio-export,output = <1>;
  61                         gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
  62                 };
  63         };
  64 };
  65
  66 &gpio0 {
  67         status = "okay";
  68 };
  69
  70 &spi0 {
  71         status = "okay";
  72
  73         flash@0 {
  74                 compatible = "jedec,spi-nor";
  75                 reg = <0>;
  76                 spi-max-frequency = <10000000>;
  77
  78                 partitions {
  79                         compatible = "fixed-partitions";
  80                         #address-cells = <1>;
  81                         #size-cells = <1>;
  82
  83                         partition@0 {
  84                                 label = "jboot";
  85                                 reg = <0x0 0x10000>;
  86                                 read-only;
  87                         };
  88
  89                         partition@10000 {
  90                                 compatible = "amit,jimage";
  91                                 label = "firmware";
  92                                 reg = <0x10000 0xfe0000>;
  93                         };
  94
  95                         config: partition@ff0000 {
  96                                 label = "config";
  97                                 reg = <0xff0000 0x10000>;
  98                                 read-only;
  99                         };
 100                 };
 101         };
 102 };
 103
 104 &ehci {
 105         status = "okay";
 106 };
 107
 108 &ohci {
 109         status = "okay";
 110 };
 111
 112 &ethernet {
 113         status = "okay";
 114         pinctrl-names = "default";
 115         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
 116
 117         port@5 {
 118                 status = "okay";
 119                 phy-mode = "rgmii";
 120                 mediatek,fixed-link = <1000 1 1 1>;
 121         };
 122
 123         mdio-bus {
 124                 status = "okay";
 125                 mediatek,mdio-mode = <1>;
 126
 127                 phy0: ethernet-phy@0 {
 128                         reg = <0>;
 129                         phy-mode = "rgmii";
 130                         qca,ar8327-initvals = <
 131                                 0x04 0x87300000 /* PORT0 PAD MODE CTRL */
 132                                 0x0c 0x00000000 /* PORT6 PAD MODE CTRL */
 133                                 0x7c 0x0000007e /* PORT0_STATUS */
 134                                 0x94 0x00000000 /* PORT6_STATUS */
 135                         >;
 136                 };
 137
 138                 phy1: ethernet-phy@1 {
 139                         reg = <1>;
 140                         phy-mode = "rgmii";
 141                 };
 142
 143                 phy2: ethernet-phy@2 {
 144                         reg = <2>;
 145                         phy-mode = "rgmii";
 146                 };
 147
 148                 phy3: ethernet-phy@3 {
 149                         reg = <3>;
 150                         phy-mode = "rgmii";
 151                 };
 152
 153                 phy4: ethernet-phy@4 {
 154                         reg = <4>;
 155                         phy-mode = "rgmii";
 156                 };
 157         };
 158 };
 159
 160 &pcie {
 161         status = "okay";
 162 };
 163
 164 &pcie0 {
 165         mt76x0e@0,0 {
 166                 reg = <0x0000 0 0 0 0>;
 167                 mtd-mac-address = <&config 0xe07e>;
 168                 mtd-mac-address-increment = <(2)>;
 169                 mediatek,mtd-eeprom = <&config 0xe08a>;
 170         };
 171 };
 172
 173 &state_default {
 174         gpio {
 175                 ralink,group = "uartf", "i2c";
 176                 ralink,function = "gpio";
 177         };
 178 };