target/linux/ramips/dts/mt7620a_edimax_ew-747x.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "ralink,mt7620a-soc";
  10
  11         aliases {
  12                 led-boot = &led_power;
  13                 led-failsafe = &led_power;
  14                 led-running = &led_power;
  15                 led-upgrade = &led_power;
  16         };
  17
  18         chosen {
  19                 bootargs = "console=ttyS0,57600";
  20         };
  21
  22         keys {
  23                 compatible = "gpio-keys";
  24
  25                 reset_wps {
  26                         label = "reset_wps";
  27                         gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
  28                         linux,code = <KEY_RESTART>;
  29                 };
  30
  31                 switch_high {
  32                         label = "switch high";
  33                         gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
  34                         linux,code = <BTN_0>;
  35                         linux,input-type = <EV_SW>;
  36                 };
  37
  38                 switch_off {
  39                         label = "switch off";
  40                         gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
  41                         linux,code = <BTN_1>;
  42                         linux,input-type = <EV_SW>;
  43                 };
  44         };
  45 };
  46
  47 &gpio1 {
  48         status = "okay";
  49 };
  50
  51 &gpio2 {
  52         status = "okay";
  53 };
  54
  55 &spi0 {
  56         status = "okay";
  57
  58         flash@0 {
  59                 compatible = "jedec,spi-nor";
  60                 reg = <0>;
  61                 spi-max-frequency = <10000000>;
  62
  63                 partitions {
  64                         compatible = "fixed-partitions";
  65                         #address-cells = <1>;
  66                         #size-cells = <1>;
  67
  68                         partition@0 {
  69                                 label = "u-boot";
  70                                 reg = <0x0 0x30000>;
  71                                 read-only;
  72                         };
  73
  74                         partition@30000 {
  75                                 label = "u-boot-env";
  76                                 reg = <0x30000 0x10000>;
  77                                 read-only;
  78                         };
  79
  80                         factory: partition@40000 {
  81                                 label = "factory";
  82                                 reg = <0x40000 0x10000>;
  83                                 read-only;
  84                         };
  85
  86                         partition@50000 {
  87                                 label = "cimage";
  88                                 reg = <0x50000 0x20000>;
  89                                 read-only;
  90                         };
  91
  92                         partition@70000 {
  93                                 compatible = "edimax,uimage";
  94                                 label = "firmware";
  95                                 reg = <0x00070000 0x00790000>;
  96                         };
  97                 };
  98         };
  99 };
 100
 101 &state_default {
 102         gpio {
 103                 ralink,group = "i2c", "uartf", "nd_sd", "rgmii2";
 104                 ralink,function = "gpio";
 105         };
 106 };
 107
 108 &pinctrl {
 109         phy_reset_pins: phy-reset {
 110                 gpio {
 111                         ralink,group = "spi refclk";
 112                         ralink,function = "gpio";
 113                 };
 114         };
 115 };
 116
 117 &ethernet {
 118         status = "okay";
 119
 120         mtd-mac-address = <&factory 0x4>;
 121
 122         pinctrl-names = "default";
 123         pinctrl-0 = <&rgmii1_pins &mdio_pins &phy_reset_pins>;
 124
 125         mediatek,portmap = "l";
 126         mediatek,mdio-mode = <1>;
 127
 128         phy-reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 129         phy-reset-duration = <30>;
 130
 131         port@5 {
 132                 status = "okay";
 133                 mediatek,fixed-link = <1000 1 1 1>;
 134                 phy-mode = "rgmii";
 135         };
 136
 137         mdio-bus {
 138                 status = "okay";
 139
 140                 phy0: ethernet-phy@0 {
 141                         status = "disabled";
 142                         reg = <0>;
 143                         phy-mode = "rgmii";
 144                 };
 145
 146                 phy1: ethernet-phy@1 {
 147                         status = "disabled";
 148                         reg = <1>;
 149                         phy-mode = "rgmii";
 150                 };
 151
 152                 phy2: ethernet-phy@2 {
 153                         status = "disabled";
 154                         reg = <2>;
 155                         phy-mode = "rgmii";
 156                 };
 157
 158                 phy3: ethernet-phy@3 {
 159                         status = "disabled";
 160                         reg = <3>;
 161                         phy-mode = "rgmii";
 162                 };
 163
 164                 phy4: ethernet-phy@4 {
 165                         status = "disabled";
 166                         reg = <4>;
 167                         phy-mode = "rgmii";
 168                 };
 169         };
 170 };
 171
 172 &gsw {
 173         mediatek,port5 = "gmac";
 174 };
 175
 176 &wmac {
 177         ralink,mtd-eeprom = <&factory 0>;
 178 };
 179
 180 &pcie {
 181         status = "okay";
 182 };
 183
 184 &pcie0 {
 185         wifi@0,0 {
 186                 reg = <0x0000 0 0 0 0>;
 187                 mediatek,mtd-eeprom = <&factory 0x8000>;
 188                 mediatek,2ghz = <0>;
 189         };
 190 };