4 compatible = "ralink,mtk7620a-soc";
8 compatible = "mips,mips24KEc";
13 bootargs = "console=ttyS0,57600";
18 #interrupt-cells = <1>;
20 compatible = "mti,cpu-interrupt-controller";
24 compatible = "palmbus";
25 reg = <0x10000000 0x200000>;
26 ranges = <0x0 0x10000000 0x1FFFFF>;
32 compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
37 compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
40 interrupt-parent = <&intc>;
45 compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
48 resets = <&rstctrl 8>;
51 interrupt-parent = <&intc>;
56 compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
59 resets = <&rstctrl 19>;
63 #interrupt-cells = <1>;
65 interrupt-parent = <&cpuintc>;
70 compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
73 resets = <&rstctrl 20>;
76 interrupt-parent = <&intc>;
81 compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
84 resets = <&rstctrl 12>;
87 interrupt-parent = <&intc>;
96 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
99 resets = <&rstctrl 13>;
102 interrupt-parent = <&intc>;
108 ralink,gpio-base = <0>;
109 ralink,num-gpios = <24>;
110 ralink,register-map = [ 00 04 08 0c
116 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
119 interrupt-parent = <&intc>;
125 ralink,gpio-base = <24>;
126 ralink,num-gpios = <16>;
127 ralink,register-map = [ 00 04 08 0c
135 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
138 interrupt-parent = <&intc>;
144 ralink,gpio-base = <40>;
145 ralink,num-gpios = <32>;
146 ralink,register-map = [ 00 04 08 0c
154 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
157 interrupt-parent = <&intc>;
163 ralink,gpio-base = <72>;
164 ralink,num-gpios = <1>;
165 ralink,register-map = [ 00 04 08 0c
173 compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c";
176 resets = <&rstctrl 16>;
179 #address-cells = <1>;
184 pinctrl-names = "default";
185 pinctrl-0 = <&i2c_pins>;
189 compatible = "ralink,mt7620a-i2s";
192 resets = <&rstctrl 17>;
195 interrupt-parent = <&intc>;
200 dma-names = "tx", "rx";
206 compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
209 resets = <&rstctrl 18>;
212 #address-cells = <1>;
217 pinctrl-names = "default";
218 pinctrl-0 = <&spi_pins>;
222 compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
225 resets = <&rstctrl 19>;
226 reset-names = "uartl";
228 interrupt-parent = <&intc>;
233 pinctrl-names = "default";
234 pinctrl-0 = <&uartlite_pins>;
238 compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
241 resets = <&rstctrl 28>;
242 reset-names = "intc";
244 interrupt-parent = <&cpuintc>;
249 compatible = "ralink,mt7620a-pcm";
250 reg = <0x2000 0x800>;
252 resets = <&rstctrl 11>;
255 interrupt-parent = <&intc>;
262 compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
263 reg = <0x2800 0x800>;
265 resets = <&rstctrl 14>;
268 interrupt-parent = <&intc>;
272 #dma-channels = <16>;
273 #dma-requests = <16>;
280 compatible = "ralink,rt2880-pinmux";
281 pinctrl-names = "default";
282 pinctrl-0 = <&state_default>;
283 state_default: pinctrl0 {
285 pcm_i2s_pins: pcm_i2s {
287 ralink,group = "uartf";
288 ralink,function = "pcm i2s";
291 uartf_gpio_pins: uartf_gpio {
293 ralink,group = "uartf";
294 ralink,function = "gpio uartf";
299 ralink,group = "spi";
300 ralink,function = "spi";
305 ralink,group = "i2c";
306 ralink,function = "i2c";
309 uartlite_pins: uartlite {
311 ralink,group = "uartlite";
312 ralink,function = "uartlite";
317 ralink,group = "mdio";
318 ralink,function = "mdio";
323 ralink,group = "ephy";
324 ralink,function = "ephy";
329 ralink,group = "wled";
330 ralink,function = "wled";
333 rgmii1_pins: rgmii1 {
335 ralink,group = "rgmii1";
336 ralink,function = "rgmii1";
339 rgmii2_pins: rgmii2 {
341 ralink,group = "rgmii2";
342 ralink,function = "rgmii2";
347 ralink,group = "pcie";
348 ralink,function = "pcie rst";
354 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
359 compatible = "ralink,mt7620a-usbphy";
361 resets = <&rstctrl 22 &rstctrl 25>;
362 reset-names = "host", "device";
366 compatible = "ralink,mt7620a-eth";
367 reg = <0x10100000 10000>;
369 #address-cells = <1>;
372 interrupt-parent = <&cpuintc>;
375 resets = <&rstctrl 21 &rstctrl 23>;
376 reset-names = "fe", "esw";
379 compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port";
386 compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port";
393 #address-cells = <1>;
401 compatible = "ralink,mt7620a-gsw";
402 reg = <0x10110000 8000>;
404 interrupt-parent = <&intc>;
409 compatible = "ralink,mt7620-sdhci";
410 reg = <0x10130000 4000>;
412 interrupt-parent = <&intc>;
419 compatible = "ralink,rt3xxx-ehci";
420 reg = <0x101c0000 0x1000>;
422 interrupt-parent = <&intc>;
429 compatible = "ralink,rt3xxx-ohci";
430 reg = <0x101c1000 0x1000>;
432 interrupt-parent = <&intc>;
439 compatible = "mediatek,mt7620-pci";
440 reg = <0x10140000 0x100
443 #address-cells = <3>;
446 resets = <&rstctrl 26>;
447 reset-names = "pcie0";
449 interrupt-parent = <&cpuintc>;
452 pinctrl-names = "default";
453 pinctrl-0 = <&pcie_pins>;
459 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
460 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
466 reg = <0x0000 0 0 0 0>;
468 #address-cells = <3>;
476 compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
477 reg = <0x10180000 40000>;
479 interrupt-parent = <&cpuintc>;
482 ralink,eeprom = "soc_wmac.eeprom";