4 compatible = "ralink,mtk7620a-soc";
8 compatible = "mips,mips24KEc";
13 bootargs = "console=ttyS0,57600";
18 #interrupt-cells = <1>;
20 compatible = "mti,cpu-interrupt-controller";
30 compatible = "palmbus";
31 reg = <0x10000000 0x200000>;
32 ranges = <0x0 0x10000000 0x1FFFFF>;
38 compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
43 compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
46 interrupt-parent = <&intc>;
51 compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
54 resets = <&rstctrl 8>;
57 interrupt-parent = <&intc>;
62 compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
65 resets = <&rstctrl 19>;
69 #interrupt-cells = <1>;
71 interrupt-parent = <&cpuintc>;
76 compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
79 resets = <&rstctrl 20>;
82 interrupt-parent = <&intc>;
87 compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
90 resets = <&rstctrl 12>;
93 interrupt-parent = <&intc>;
102 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
105 resets = <&rstctrl 13>;
108 interrupt-parent = <&intc>;
114 ralink,gpio-base = <0>;
115 ralink,num-gpios = <24>;
116 ralink,register-map = [ 00 04 08 0c
122 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
125 interrupt-parent = <&intc>;
131 ralink,gpio-base = <24>;
132 ralink,num-gpios = <16>;
133 ralink,register-map = [ 00 04 08 0c
141 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
144 interrupt-parent = <&intc>;
150 ralink,gpio-base = <40>;
151 ralink,num-gpios = <32>;
152 ralink,register-map = [ 00 04 08 0c
160 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
163 interrupt-parent = <&intc>;
169 ralink,gpio-base = <72>;
170 ralink,num-gpios = <1>;
171 ralink,register-map = [ 00 04 08 0c
179 compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c";
182 resets = <&rstctrl 16>;
185 #address-cells = <1>;
190 pinctrl-names = "default";
191 pinctrl-0 = <&i2c_pins>;
195 compatible = "ralink,mt7620a-i2s";
198 resets = <&rstctrl 17>;
201 interrupt-parent = <&intc>;
206 dma-names = "tx", "rx";
212 compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
215 resets = <&rstctrl 18>;
218 #address-cells = <1>;
223 pinctrl-names = "default";
224 pinctrl-0 = <&spi_pins>;
228 compatible = "ralink,rt2880-spi";
231 resets = <&rstctrl 18>;
234 #address-cells = <1>;
239 pinctrl-names = "default";
240 pinctrl-0 = <&spi_cs1>;
243 uartlite: uartlite@c00 {
244 compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
247 resets = <&rstctrl 19>;
248 reset-names = "uartl";
250 interrupt-parent = <&intc>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&uartlite_pins>;
260 compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
263 resets = <&rstctrl 28>;
264 reset-names = "intc";
266 interrupt-parent = <&cpuintc>;
271 compatible = "ralink,mt7620a-pcm";
272 reg = <0x2000 0x800>;
274 resets = <&rstctrl 11>;
277 interrupt-parent = <&intc>;
284 compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
285 reg = <0x2800 0x800>;
287 resets = <&rstctrl 14>;
290 interrupt-parent = <&intc>;
294 #dma-channels = <16>;
295 #dma-requests = <16>;
302 compatible = "ralink,rt2880-pinmux";
303 pinctrl-names = "default";
304 pinctrl-0 = <&state_default>;
306 state_default: pinctrl0 {
309 pcm_i2s_pins: pcm_i2s {
311 ralink,group = "uartf";
312 ralink,function = "pcm i2s";
316 uartf_gpio_pins: uartf_gpio {
318 ralink,group = "uartf";
319 ralink,function = "gpio uartf";
325 ralink,group = "spi";
326 ralink,function = "spi";
332 ralink,group = "spi_cs1";
333 ralink,function = "spi_cs1";
339 ralink,group = "i2c";
340 ralink,function = "i2c";
344 uartlite_pins: uartlite {
346 ralink,group = "uartlite";
347 ralink,function = "uartlite";
353 ralink,group = "mdio";
354 ralink,function = "mdio";
360 ralink,group = "ephy";
361 ralink,function = "ephy";
367 ralink,group = "wled";
368 ralink,function = "wled";
372 rgmii1_pins: rgmii1 {
374 ralink,group = "rgmii1";
375 ralink,function = "rgmii1";
379 rgmii2_pins: rgmii2 {
381 ralink,group = "rgmii2";
382 ralink,function = "rgmii2";
388 ralink,group = "pcie";
389 ralink,function = "pcie rst";
395 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
400 compatible = "mediatek,mt7620-usbphy";
403 resets = <&rstctrl 22 &rstctrl 25>;
404 reset-names = "host", "device";
408 compatible = "mediatek,mt7620-eth";
409 reg = <0x10100000 10000>;
411 #address-cells = <1>;
414 interrupt-parent = <&cpuintc>;
417 resets = <&rstctrl 21 &rstctrl 23>;
418 reset-names = "fe", "esw";
420 mediatek,switch = <&gsw>;
423 compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
430 compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
437 #address-cells = <1>;
445 compatible = "mediatek,mt7620-gsw";
446 reg = <0x10110000 8000>;
448 resets = <&rstctrl 23>;
451 interrupt-parent = <&intc>;
456 compatible = "ralink,mt7620-sdhci";
457 reg = <0x10130000 4000>;
459 interrupt-parent = <&intc>;
466 compatible = "generic-ehci";
467 reg = <0x101c0000 0x1000>;
469 interrupt-parent = <&intc>;
479 compatible = "generic-ohci";
480 reg = <0x101c1000 0x1000>;
482 interrupt-parent = <&intc>;
492 compatible = "mediatek,mt7620-pci";
493 reg = <0x10140000 0x100
496 #address-cells = <3>;
499 resets = <&rstctrl 26>;
500 reset-names = "pcie0";
502 interrupt-parent = <&cpuintc>;
505 pinctrl-names = "default";
506 pinctrl-0 = <&pcie_pins>;
512 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
513 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
519 reg = <0x0000 0 0 0 0>;
521 #address-cells = <3>;
529 compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
530 reg = <0x10180000 40000>;
532 interrupt-parent = <&cpuintc>;
535 ralink,eeprom = "soc_wmac.eeprom";