ramips: fix MAC address setup for Xiaomi MiWiFi Nano
[oweals/openwrt.git] / target / linux / ramips / dts / mt7620a.dtsi
1 / {
2         #address-cells = <1>;
3         #size-cells = <1>;
4         compatible = "ralink,mt7620a-soc";
5
6         cpus {
7                 #address-cells = <1>;
8                 #size-cells = <0>;
9
10                 cpu@0 {
11                         compatible = "mips,mips24KEc";
12                         reg = <0>;
13                 };
14         };
15
16         chosen {
17                 bootargs = "console=ttyS0,57600";
18         };
19
20         cpuintc: cpuintc {
21                 #address-cells = <0>;
22                 #interrupt-cells = <1>;
23                 interrupt-controller;
24                 compatible = "mti,cpu-interrupt-controller";
25         };
26
27         aliases {
28                 spi0 = &spi0;
29                 spi1 = &spi1;
30                 serial0 = &uartlite;
31         };
32
33         palmbus: palmbus@10000000 {
34                 compatible = "palmbus";
35                 reg = <0x10000000 0x200000>;
36                 ranges = <0x0 0x10000000 0x1FFFFF>;
37
38                 #address-cells = <1>;
39                 #size-cells = <1>;
40
41                 sysc: sysc@0 {
42                         compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc", "syscon";
43                         reg = <0x0 0x100>;
44                 };
45
46                 timer: timer@100 {
47                         compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
48                         reg = <0x100 0x20>;
49
50                         interrupt-parent = <&intc>;
51                         interrupts = <1>;
52                 };
53
54                 watchdog: watchdog@120 {
55                         compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
56                         reg = <0x120 0x10>;
57
58                         resets = <&rstctrl 8>;
59                         reset-names = "wdt";
60
61                         interrupt-parent = <&intc>;
62                         interrupts = <1>;
63                 };
64
65                 intc: intc@200 {
66                         compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
67                         reg = <0x200 0x100>;
68
69                         resets = <&rstctrl 19>;
70                         reset-names = "intc";
71
72                         interrupt-controller;
73                         #interrupt-cells = <1>;
74
75                         interrupt-parent = <&cpuintc>;
76                         interrupts = <2>;
77                 };
78
79                 memc: memc@300 {
80                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
81                         reg = <0x300 0x100>;
82
83                         resets = <&rstctrl 20>;
84                         reset-names = "mc";
85
86                         interrupt-parent = <&intc>;
87                         interrupts = <3>;
88                 };
89
90                 uart: uart@500 {
91                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
92                         reg = <0x500 0x100>;
93
94                         resets = <&rstctrl 12>;
95                         reset-names = "uart";
96
97                         interrupt-parent = <&intc>;
98                         interrupts = <5>;
99
100                         reg-shift = <2>;
101
102                         status = "disabled";
103                 };
104
105                 gpio0: gpio@600 {
106                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
107                         reg = <0x600 0x34>;
108
109                         resets = <&rstctrl 13>;
110                         reset-names = "pio";
111
112                         interrupt-parent = <&intc>;
113                         interrupts = <6>;
114
115                         gpio-controller;
116                         #gpio-cells = <2>;
117
118                         ralink,gpio-base = <0>;
119                         ralink,nr-gpio = <24>;
120                         ralink,register-map = [ 00 04 08 0c
121                                                 20 24 28 2c
122                                                 30 34 ];
123                 };
124
125                 gpio1: gpio@638 {
126                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
127                         reg = <0x638 0x24>;
128
129                         interrupt-parent = <&intc>;
130                         interrupts = <6>;
131
132                         gpio-controller;
133                         #gpio-cells = <2>;
134
135                         ralink,gpio-base = <24>;
136                         ralink,nr-gpio = <16>;
137                         ralink,register-map = [ 00 04 08 0c
138                                                 10 14 18 1c
139                                                 20 24 ];
140
141                         status = "disabled";
142                 };
143
144                 gpio2: gpio@660 {
145                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
146                         reg = <0x660 0x24>;
147
148                         interrupt-parent = <&intc>;
149                         interrupts = <6>;
150
151                         gpio-controller;
152                         #gpio-cells = <2>;
153
154                         ralink,gpio-base = <40>;
155                         ralink,nr-gpio = <32>;
156                         ralink,register-map = [ 00 04 08 0c
157                                                 10 14 18 1c
158                                                 20 24 ];
159
160                         status = "disabled";
161                 };
162
163                 gpio3: gpio@688 {
164                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
165                         reg = <0x688 0x24>;
166
167                         interrupt-parent = <&intc>;
168                         interrupts = <6>;
169
170                         gpio-controller;
171                         #gpio-cells = <2>;
172
173                         ralink,gpio-base = <72>;
174                         ralink,nr-gpio = <1>;
175                         ralink,register-map = [ 00 04 08 0c
176                                                 10 14 18 1c
177                                                 20 24 ];
178
179                         status = "disabled";
180                 };
181
182                 i2c: i2c@900 {
183                         compatible = "ralink,rt2880-i2c";
184                         reg = <0x900 0x100>;
185
186                         resets = <&rstctrl 16>;
187                         reset-names = "i2c";
188
189                         #address-cells = <1>;
190                         #size-cells = <0>;
191
192                         status = "disabled";
193
194                         pinctrl-names = "default";
195                         pinctrl-0 = <&i2c_pins>;
196                 };
197
198                 i2s: i2s@a00 {
199                         compatible = "mediatek,mt7620-i2s";
200                         reg = <0xa00 0x100>;
201
202                         resets = <&rstctrl 17>;
203                         reset-names = "i2s";
204
205                         interrupt-parent = <&intc>;
206                         interrupts = <10>;
207
208                         txdma-req = <2>;
209                         rxdma-req = <3>;
210
211                         dmas = <&gdma 4>,
212                                 <&gdma 6>;
213                         dma-names = "tx", "rx";
214
215                         status = "disabled";
216                 };
217
218                 spi0: spi@b00 {
219                         compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
220                         reg = <0xb00 0x40>;
221
222                         resets = <&rstctrl 18>;
223                         reset-names = "spi";
224
225                         #address-cells = <1>;
226                         #size-cells = <0>;
227
228                         status = "disabled";
229
230                         pinctrl-names = "default";
231                         pinctrl-0 = <&spi_pins>;
232                 };
233
234                 spi1: spi@b40 {
235                         compatible = "ralink,rt2880-spi";
236                         reg = <0xb40 0x60>;
237
238                         resets = <&rstctrl 18>;
239                         reset-names = "spi";
240
241                         #address-cells = <1>;
242                         #size-cells = <0>;
243
244                         status = "disabled";
245
246                         pinctrl-names = "default";
247                         pinctrl-0 = <&spi_cs1>;
248                 };
249
250                 uartlite: uartlite@c00 {
251                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
252                         reg = <0xc00 0x100>;
253
254                         resets = <&rstctrl 19>;
255                         reset-names = "uartl";
256
257                         interrupt-parent = <&intc>;
258                         interrupts = <12>;
259
260                         reg-shift = <2>;
261
262                         pinctrl-names = "default";
263                         pinctrl-0 = <&uartlite_pins>;
264                 };
265
266                 systick: systick@d00 {
267                         compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
268                         reg = <0xd00 0x10>;
269
270                         resets = <&rstctrl 28>;
271                         reset-names = "intc";
272
273                         interrupt-parent = <&cpuintc>;
274                         interrupts = <7>;
275                 };
276
277                 pcm: pcm@2000 {
278                         compatible = "ralink,mt7620a-pcm";
279                         reg = <0x2000 0x800>;
280
281                         resets = <&rstctrl 11>;
282                         reset-names = "pcm";
283
284                         interrupt-parent = <&intc>;
285                         interrupts = <4>;
286
287                         status = "disabled";
288                 };
289
290                 gdma: gdma@2800 {
291                         compatible = "ralink,mt7620a-gdma", "ralink,rt3883-gdma";
292                         reg = <0x2800 0x800>;
293
294                         resets = <&rstctrl 14>;
295                         reset-names = "dma";
296
297                         interrupt-parent = <&intc>;
298                         interrupts = <7>;
299
300                         #dma-cells = <1>;
301                         #dma-channels = <16>;
302                         #dma-requests = <16>;
303
304                         status = "disabled";
305                 };
306         };
307
308         pinctrl: pinctrl {
309                 compatible = "ralink,rt2880-pinmux";
310                 pinctrl-names = "default";
311                 pinctrl-0 = <&state_default>;
312
313                 state_default: pinctrl0 {
314                 };
315
316                 pcm_i2s_pins: pcm_i2s {
317                         pcm_i2s {
318                                 ralink,group = "uartf";
319                                 ralink,function = "pcm i2s";
320                         };
321                 };
322
323                 uartf_gpio_pins: uartf_gpio {
324                         uartf_gpio {
325                                 ralink,group = "uartf";
326                                 ralink,function = "gpio uartf";
327                         };
328                 };
329
330                 gpio_i2s_pins: gpio_i2s {
331                         gpio_i2s {
332                                 ralink,group = "uartf";
333                                 ralink,function = "gpio i2s";
334                         };
335                 };
336
337                 spi_pins: spi_pins {
338                         spi_pins {
339                                 ralink,group = "spi";
340                                 ralink,function = "spi";
341                         };
342                 };
343
344                 spi_cs1: spi1 {
345                         spi1 {
346                                 ralink,group = "spi refclk";
347                                 ralink,function = "spi refclk";
348                         };
349                 };
350
351                 i2c_pins: i2c_pins {
352                         i2c_pins {
353                                 ralink,group = "i2c";
354                                 ralink,function = "i2c";
355                         };
356                 };
357
358                 uartlite_pins: uartlite {
359                         uart {
360                                 ralink,group = "uartlite";
361                                 ralink,function = "uartlite";
362                         };
363                 };
364
365                 mdio_pins: mdio {
366                         mdio {
367                                 ralink,group = "mdio";
368                                 ralink,function = "mdio";
369                         };
370                 };
371
372                 mdio_refclk_pins: mdio_refclk {
373                         mdio_refclk {
374                                 ralink,group = "mdio";
375                                 ralink,function = "refclk";
376                         };
377                 };
378
379                 ephy_pins: ephy {
380                         ephy {
381                                 ralink,group = "ephy";
382                                 ralink,function = "ephy";
383                         };
384                 };
385
386                 wled_pins: wled {
387                         wled {
388                                 ralink,group = "wled";
389                                 ralink,function = "wled";
390                         };
391                 };
392
393                 rgmii1_pins: rgmii1 {
394                         rgmii1 {
395                                 ralink,group = "rgmii1";
396                                 ralink,function = "rgmii1";
397                         };
398                 };
399
400                 rgmii2_pins: rgmii2 {
401                         rgmii2 {
402                                 ralink,group = "rgmii2";
403                                 ralink,function = "rgmii2";
404                         };
405                 };
406
407                 pcie_pins: pcie {
408                         pcie {
409                                 ralink,group = "pcie";
410                                 ralink,function = "pcie rst";
411                         };
412                 };
413
414                 pa_pins: pa {
415                         pa {
416                                 ralink,group = "pa";
417                                 ralink,function = "pa";
418                         };
419                 };
420
421                 sdhci_pins: sdhci {
422                         sdhci {
423                                 ralink,group = "nd_sd";
424                                 ralink,function = "sd";
425                         };
426                 };
427         };
428
429         rstctrl: rstctrl {
430                 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
431                 #reset-cells = <1>;
432         };
433
434         clkctrl: clkctrl {
435                 compatible = "ralink,rt2880-clock";
436                 #clock-cells = <1>;
437         };
438
439         usbphy: usbphy {
440                 compatible = "mediatek,mt7620-usbphy";
441                 #phy-cells = <0>;
442
443                 ralink,sysctl = <&sysc>;
444                 resets = <&rstctrl 22 &rstctrl 25>;
445                 reset-names = "host", "device";
446
447                 clocks = <&clkctrl 22 &clkctrl 25>;
448                 clock-names = "host", "device";
449         };
450
451         ethernet: ethernet@10100000 {
452                 compatible = "mediatek,mt7620-eth";
453                 reg = <0x10100000 0x10000>;
454
455                 #address-cells = <1>;
456                 #size-cells = <0>;
457
458                 interrupt-parent = <&cpuintc>;
459                 interrupts = <5>;
460
461                 resets = <&rstctrl 21 &rstctrl 23>;
462                 reset-names = "fe", "esw";
463
464                 mediatek,switch = <&gsw>;
465
466                 port@4 {
467                         compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
468                         reg = <4>;
469
470                         status = "disabled";
471                 };
472
473                 port@5 {
474                         compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
475                         reg = <5>;
476
477                         status = "disabled";
478                 };
479
480                 mdio-bus {
481                         #address-cells = <1>;
482                         #size-cells = <0>;
483
484                         status = "disabled";
485                 };
486         };
487
488         gsw: gsw@10110000 {
489                 compatible = "mediatek,mt7620-gsw";
490                 reg = <0x10110000 0x8000>;
491
492                 resets = <&rstctrl 23>;
493                 reset-names = "esw";
494
495                 interrupt-parent = <&intc>;
496                 interrupts = <17>;
497         };
498
499         sdhci: sdhci@10130000 {
500                 compatible = "ralink,mt7620-sdhci";
501                 reg = <0x10130000 0x4000>;
502
503                 interrupt-parent = <&intc>;
504                 interrupts = <14>;
505
506                 pinctrl-names = "default";
507                 pinctrl-0 = <&sdhci_pins>;
508
509                 status = "disabled";
510         };
511
512         ehci: ehci@101c0000 {
513                 #address-cells = <1>;
514                 #size-cells = <0>;
515                 compatible = "generic-ehci";
516                 reg = <0x101c0000 0x1000>;
517
518                 interrupt-parent = <&intc>;
519                 interrupts = <18>;
520
521                 phys = <&usbphy>;
522                 phy-names = "usb";
523
524                 status = "disabled";
525
526                 ehci_port1: port@1 {
527                         reg = <1>;
528                         #trigger-source-cells = <0>;
529                 };
530         };
531
532         ohci: ohci@101c1000 {
533                 #address-cells = <1>;
534                 #size-cells = <0>;
535                 compatible = "generic-ohci";
536                 reg = <0x101c1000 0x1000>;
537
538                 interrupt-parent = <&intc>;
539                 interrupts = <18>;
540
541                 phys = <&usbphy>;
542                 phy-names = "usb";
543
544                 status = "disabled";
545
546                 ohci_port1: port@1 {
547                         reg = <1>;
548                         #trigger-source-cells = <0>;
549                 };
550         };
551
552         pcie: pcie@10140000 {
553                 compatible = "mediatek,mt7620-pci";
554                 reg = <0x10140000 0x100
555                         0x10142000 0x100>;
556
557                 #address-cells = <3>;
558                 #size-cells = <2>;
559
560                 resets = <&rstctrl 26>;
561                 reset-names = "pcie0";
562
563                 clocks = <&clkctrl 26>;
564                 clock-names = "pcie0";
565
566                 interrupt-parent = <&cpuintc>;
567                 interrupts = <4>;
568
569                 pinctrl-names = "default";
570                 pinctrl-0 = <&pcie_pins>;
571
572                 device_type = "pci";
573
574                 bus-range = <0 255>;
575                 ranges = <
576                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
577                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
578                 >;
579
580                 status = "disabled";
581
582                 pcie0: pcie@0,0 {
583                         reg = <0x0000 0 0 0 0>;
584
585                         #address-cells = <3>;
586                         #size-cells = <2>;
587
588                         device_type = "pci";
589
590                         ranges;
591                 };
592         };
593
594         wmac: wmac@10180000 {
595                 compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
596                 reg = <0x10180000 0x40000>;
597
598                 interrupt-parent = <&cpuintc>;
599                 interrupts = <6>;
600
601                 ralink,eeprom = "soc_wmac.eeprom";
602         };
603 };