target/linux/ramips/dts/WNDR3700V5.dts

   1 /dts-v1/;
   2
   3 #include "mt7621.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "netgear,wndr3700-v5", "mediatek,mt7621-soc";
  10         model = "Netgear WNDR3700v5";
  11
  12         aliases {
  13                 led-boot = &led_power;
  14                 led-failsafe = &led_power;
  15                 led-running = &led_power;
  16                 led-upgrade = &led_power;
  17         };
  18
  19         memory@0 {
  20                 device_type = "memory";
  21                 reg = <0x0 0x8000000>;
  22         };
  23
  24         chosen {
  25                 bootargs = "console=ttyS0,57600 maxcpus=2";
  26         };
  27
  28         gpio-leds {
  29                 compatible = "gpio-leds";
  30
  31                 wps {
  32                         label = "wndr3700v5:green:wps";
  33                         gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  34                 };
  35
  36                 led_power: power {
  37                         label = "wndr3700v5:green:power";
  38                         gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  39                 };
  40         };
  41
  42         gpio-keys-polled {
  43                 compatible = "gpio-keys-polled";
  44                 poll-interval = <20>;
  45
  46                 wps {
  47                         label = "wndr3700v5:wps";
  48                         gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
  49                         linux,code = <KEY_WPS_BUTTON>;
  50                 };
  51
  52                 wifi {
  53                         label = "wndr3700v5:wifi";
  54                         gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
  55                         linux,code = <KEY_RFKILL>;
  56                 };
  57
  58                 reset {
  59                         label = "wndr3700v5:reset";
  60                         gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
  61                         linux,code = <KEY_RESTART>;
  62                 };
  63         };
  64
  65         gpio_export {
  66                 compatible = "gpio-export";
  67                 #size-cells = <0>;
  68
  69                 usbpower {
  70                         gpio-export,name = "usbpower";
  71                         gpio-export,output = <1>;
  72                         gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
  73                 };
  74         };
  75 };
  76
  77 &spi0 {
  78         status = "okay";
  79
  80         mx25l12805d@0 {
  81                 compatible = "jedec,spi-nor";
  82                 reg = <0>;
  83                 spi-max-frequency = <10000000>;
  84                 m25p,chunked-io = <32>;
  85
  86                 partitions {
  87                         compatible = "fixed-partitions";
  88                         #address-cells = <1>;
  89                         #size-cells = <1>;
  90
  91                         partition@0 {
  92                                 label = "u-boot";
  93                                 reg = <0x0 0x30000>;
  94                                 read-only;
  95                         };
  96
  97                         partition@30000 {
  98                                 label = "u-boot-env";
  99                                 reg = <0x30000 0x10000>;
 100                                 read-only;
 101                         };
 102
 103                         factory: partition@f30000 {
 104                                 label = "factory";
 105                                 reg = <0xf30000 0x10000>;
 106                                 read-only;
 107                         };
 108
 109                         partition@50000 {
 110                                 compatible = "denx,uimage";
 111                                 label = "firmware";
 112                                 reg = <0x50000 0xee0000>;
 113                         };
 114                 };
 115         };
 116 };
 117
 118 &pcie {
 119         status = "okay";
 120 };
 121
 122 &pcie0 {
 123         mt76@0,0 {
 124                 reg = <0x0000 0 0 0 0>;
 125                 mediatek,mtd-eeprom = <&factory 0x8000>;
 126                 ieee80211-freq-limit = <5000000 6000000>;
 127         };
 128 };
 129
 130 &pcie1 {
 131         mt76@0,0 {
 132                 reg = <0x0000 0 0 0 0>;
 133                 mediatek,mtd-eeprom = <&factory 0x0000>;
 134         };
 135 };
 136
 137 &ethernet {
 138         mtd-mac-address = <&factory 0x0000000c>;
 139 };
 140
 141 &pinctrl {
 142         state_default: pinctrl0 {
 143                 gpio {
 144                         ralink,group = "rgmii2", "mdio", "wdt";
 145                         ralink,function = "gpio";
 146                 };
 147         };
 148 };