target/linux/ramips/dts/PSG1208.dts

   1 /dts-v1/;
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "phicomm,psg1208", "ralink,mt7620a-soc";
  10         model = "Phicomm PSG1208";
  11
  12         gpio-leds {
  13                 compatible = "gpio-leds";
  14
  15                 wan {
  16                         label = "psg1208:white:wps";
  17                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  18                 };
  19
  20                 wlan {
  21                         label = "psg1208:white:wlan2g";
  22                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  23                 };
  24         };
  25
  26         gpio-keys-polled {
  27                 compatible = "gpio-keys-polled";
  28                 #address-cells = <1>;
  29                 #size-cells = <0>;
  30                 poll-interval = <20>;
  31
  32                 reset {
  33                         label = "reset";
  34                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  35                         linux,code = <KEY_RESTART>;
  36                 };
  37         };
  38 };
  39
  40 &gpio1 {
  41         status = "okay";
  42 };
  43
  44 &gpio3 {
  45         status = "okay";
  46 };
  47
  48 &spi0 {
  49         status = "okay";
  50
  51         m25p80@0 {
  52                 #address-cells = <1>;
  53                 #size-cells = <1>;
  54                 compatible = "jedec,spi-nor";
  55                 reg = <0>;
  56                 spi-max-frequency = <10000000>;
  57
  58                 partition@0 {
  59                         label = "u-boot";
  60                         reg = <0x0 0x30000>;
  61                         read-only;
  62                 };
  63
  64                 partition@20000 {
  65                         label = "u-boot-env";
  66                         reg = <0x30000 0x10000>;
  67                         read-only;
  68                 };
  69
  70                 factory: partition@30000 {
  71                         label = "factory";
  72                         reg = <0x40000 0x10000>;
  73                         read-only;
  74                 };
  75
  76                 partition@40000 {
  77                         label = "firmware";
  78                         reg = <0x50000 0x7b0000>;
  79                 };
  80         };
  81 };
  82
  83 &pinctrl {
  84         state_default: pinctrl0 {
  85                 gpio {
  86                         ralink,group = "i2c", "spi refclk", "wled";
  87                         ralink,function = "gpio";
  88                 };
  89         };
  90 };
  91
  92 &ethernet {
  93         pinctrl-names = "default";
  94         pinctrl-0 = <&ephy_pins>;
  95         mtd-mac-address = <&factory 0x4>;
  96         mediatek,portmap = "llllw";
  97 };
  98
  99 &pcie {
 100         status = "okay";
 101
 102         pcie-bridge {
 103                 mt76@0,0 {
 104                         reg = <0x0000 0 0 0 0>;
 105                         device_type = "pci";
 106                         mediatek,mtd-eeprom = <&factory 0x8000>;
 107                         ieee80211-freq-limit = <5000000 6000000>;
 108                 };
 109         };
 110 };
 111
 112 &wmac {
 113         ralink,mtd-eeprom = <&factory 0>;
 114 };