ramips: fix MTD EEPROM offset for TL-WR840N v5
[oweals/openwrt.git] / target / linux / ramips / dts / MZK-WDPR.dts
1 /dts-v1/;
2
3 #include "rt3050.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6
7 / {
8         compatible = "planex,mzk-wdpr", "ralink,rt3052-soc";
9         model = "Planex MZK-WDPR";
10
11         chosen {
12                 bootargs = "console=ttyS0,115200";
13         };
14
15         cfi@1f000000 {
16                 compatible = "cfi-flash";
17                 reg = <0x1f000000 0x800000>;
18
19                 bank-width = <2>;
20                 device-width = <2>;
21
22                 partitions {
23                         compatible = "fixed-partitions";
24                         #address-cells = <1>;
25                         #size-cells = <1>;
26
27                         partition@0 {
28                                 label = "u-boot";
29                                 reg = <0x0 0x30000>;
30                                 read-only;
31                         };
32
33                         partition@30000 {
34                                 label = "u-boot-env";
35                                 reg = <0x30000 0x10000>;
36                                 read-only;
37                         };
38
39                         factory: partition@40000 {
40                                 label = "factory";
41                                 reg = <0x40000 0x10000>;
42                                 read-only;
43                         };
44
45                         partition@7f0000 {
46                                 label = "Data3G";
47                                 reg = <0x7f0000 0x10000>;
48                                 read-only;
49                         };
50
51                         partition@50000 {
52                                 label = "firmware";
53                                 reg = <0x50000 0x680000>;
54                         };
55                 };
56         };
57
58         gpio-export {
59                 compatible = "gpio-export";
60
61                 lcd_ctrl1 {
62                         gpio-export,name = "lcd_ctrl1";
63                         gpio-export,output = <0>;
64                         gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
65                 };
66         };
67 };
68
69 &pinctrl {
70         state_default: pinctrl0 {
71                 gpio {
72                         ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
73                         ralink,function = "gpio";
74                 };
75         };
76 };
77
78 &ethernet {
79         mtd-mac-address = <&factory 0x28>;
80 };
81
82 &esw {
83         mediatek,portmap = <0x2f>;
84 };
85
86 &wmac {
87         ralink,mtd-eeprom = <&factory 0>;
88 };
89
90 &otg {
91         status = "okay";
92 };