kernel: bump 4.9 to 4.9.65
[oweals/openwrt.git] / target / linux / ramips / dts / MT7620a.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9         compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
10         model = "Ralink MT7620a + MT7610e evaluation board";
11
12         gpio-keys-polled {
13                 compatible = "gpio-keys";
14                 #address-cells = <1>;
15                 #size-cells = <0>;
16                 poll-interval = <20>;
17
18                 s2 {
19                         label = "S2";
20                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
21                         linux,code = <BTN_0>;
22                 };
23
24                 s3 {
25                         label = "S3";
26                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
27                         linux,code = <BTN_1>;
28                 };
29         };
30 };
31
32 &spi0 {
33         status = "okay";
34
35         m25p80@0 {
36                 #address-cells = <1>;
37                 #size-cells = <1>;
38                 compatible = "jedec,spi-nor";
39                 reg = <0>;
40                 spi-max-frequency = <10000000>;
41
42                 partition@0 {
43                         label = "u-boot";
44                         reg = <0x0 0x30000>;
45                         read-only;
46                 };
47
48                 partition@30000 {
49                         label = "u-boot-env";
50                         reg = <0x30000 0x10000>;
51                         read-only;
52                 };
53
54                 factory: partition@40000 {
55                         label = "factory";
56                         reg = <0x40000 0x10000>;
57                         read-only;
58                 };
59
60                 partition@50000 {
61                         label = "firmware";
62                         reg = <0x50000 0x7b0000>;
63                 };
64         };
65 };
66
67 &pinctrl {
68         state_default: pinctrl0 {
69                 gpio {
70                         ralink,group = "i2c", "uartf";
71                         ralink,function = "gpio";
72                 };
73         };
74 };
75
76 &ethernet {
77         status = "okay";
78         pinctrl-names = "default";
79         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
80         mediatek,portmap = "llllw";
81
82         port@4 {
83                 status = "okay";
84                 phy-mode = "rgmii";
85                 phy-handle = <&phy4>;
86         };
87
88         port@5 {
89                 status = "okay";
90                 phy-mode = "rgmii";
91                 phy-handle = <&phy5>;
92         };
93
94         mdio-bus {
95                 status = "okay";
96
97                 phy4: ethernet-phy@4 {
98                         reg = <4>;
99                         phy-mode = "rgmii";
100                 };
101
102                 phy5: ethernet-phy@5 {
103                         reg = <5>;
104                         phy-mode = "rgmii";
105                 };
106         };
107 };
108
109 &gsw {
110         mediatek,port4 = "gmac";
111 };
112
113 &sdhci {
114         status = "okay";
115 };
116
117 &pcie {
118         status = "okay";
119 };
120
121 &ehci {
122         status = "okay";
123 };
124
125 &ohci {
126         status = "okay";
127 };