ramips: fix MTD EEPROM offset for TL-WR840N v5
[oweals/openwrt.git] / target / linux / ramips / dts / MT7620a.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9         compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
10         model = "Ralink MT7620a + MT7610e evaluation board";
11
12         gpio-keys-polled {
13                 compatible = "gpio-keys";
14                 poll-interval = <20>;
15
16                 s2 {
17                         label = "S2";
18                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
19                         linux,code = <BTN_0>;
20                 };
21
22                 s3 {
23                         label = "S3";
24                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
25                         linux,code = <BTN_1>;
26                 };
27         };
28 };
29
30 &spi0 {
31         status = "okay";
32
33         m25p80@0 {
34                 compatible = "jedec,spi-nor";
35                 reg = <0>;
36                 spi-max-frequency = <10000000>;
37
38                 partitions {
39                         compatible = "fixed-partitions";
40                         #address-cells = <1>;
41                         #size-cells = <1>;
42
43                         partition@0 {
44                                 label = "u-boot";
45                                 reg = <0x0 0x30000>;
46                                 read-only;
47                         };
48
49                         partition@30000 {
50                                 label = "u-boot-env";
51                                 reg = <0x30000 0x10000>;
52                                 read-only;
53                         };
54
55                         factory: partition@40000 {
56                                 label = "factory";
57                                 reg = <0x40000 0x10000>;
58                                 read-only;
59                         };
60
61                         partition@50000 {
62                                 label = "firmware";
63                                 reg = <0x50000 0x7b0000>;
64                         };
65                 };
66         };
67 };
68
69 &pinctrl {
70         state_default: pinctrl0 {
71                 gpio {
72                         ralink,group = "i2c", "uartf";
73                         ralink,function = "gpio";
74                 };
75         };
76 };
77
78 &ethernet {
79         status = "okay";
80         pinctrl-names = "default";
81         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
82         mediatek,portmap = "llllw";
83
84         port@4 {
85                 status = "okay";
86                 phy-mode = "rgmii";
87                 phy-handle = <&phy4>;
88         };
89
90         port@5 {
91                 status = "okay";
92                 phy-mode = "rgmii";
93                 phy-handle = <&phy5>;
94         };
95
96         mdio-bus {
97                 status = "okay";
98
99                 phy4: ethernet-phy@4 {
100                         reg = <4>;
101                         phy-mode = "rgmii";
102                 };
103
104                 phy5: ethernet-phy@5 {
105                         reg = <5>;
106                         phy-mode = "rgmii";
107                 };
108         };
109 };
110
111 &gsw {
112         mediatek,port4 = "gmac";
113 };
114
115 &sdhci {
116         status = "okay";
117 };
118
119 &pcie {
120         status = "okay";
121 };
122
123 &ehci {
124         status = "okay";
125 };
126
127 &ohci {
128         status = "okay";
129 };