1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
10 compatible = "xiaomi,mir3p", "mediatek,mt7621-soc";
11 model = "Xiaomi Mi Router 3 Pro";
14 led-boot = &led_status_yellow;
15 led-failsafe = &led_status_red;
16 led-running = &led_status_blue;
17 led-upgrade = &led_status_yellow;
21 device_type = "memory";
22 reg = <0x0 0x1c000000>, <0x20000000 0x04000000>;
26 bootargs = "console=ttyS0,115200n8";
30 compatible = "gpio-leds";
32 led_status_red: status_red {
33 label = "mir3p:red:status";
34 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
37 led_status_blue: status_blue {
38 label = "mir3p:blue:status";
39 gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
42 led_status_yellow: status_yellow {
43 label = "mir3p:yellow:status";
44 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
48 label = "mir3p:amber:wan";
49 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
53 label = "mir3p:amber:lan3";
54 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
58 label = "mir3p:amber:lan2";
59 gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
63 label = "mir3p:amber:lan1";
64 gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
69 compatible = "gpio-keys-polled";
74 gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
75 linux,code = <KEY_RESTART>;
79 reg_usb_vbus: regulator {
80 compatible = "regulator-fixed";
81 regulator-name = "usb_vbus";
82 regulator-min-microvolt = <5000000>;
83 regulator-max-microvolt = <5000000>;
84 gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
90 vbus-supply = <®_usb_vbus>;
97 compatible = "fixed-partitions";
102 label = "Bootloader";
109 reg = <0x40000 0x40000>;
114 reg = <0x80000 0x40000>;
118 factory: partition@c0000 {
120 reg = <0x0c0000 0x40000>;
126 reg = <0x100000 0x40000>;
130 label = "crash_syslog";
131 reg = <0x140000 0x80000>;
136 reg = <0x1c0000 0x40000>;
140 /* We keep stock xiaomi firmware (kernel0) here */
142 label = "kernel_stock";
143 reg = <0x200000 0x400000>;
148 reg = <0x600000 0x400000>;
153 reg = <0xa00000 0xf580000>;
164 compatible = "pci14c3,7615";
165 reg = <0x0000 0 0 0 0>;
166 mediatek,mtd-eeprom = <&factory 0x0000>;
172 compatible = "pci14c3,7615";
173 reg = <0x0000 0 0 0 0>;
174 mediatek,mtd-eeprom = <&factory 0x8000>;
175 ieee80211-freq-limit = <5000000 6000000>;
180 mtd-mac-address = <&factory 0xe000>;
181 mediatek,portmap = "llllw";
185 state_default: pinctrl0 {
187 ralink,group = "jtag", "uart2", "uart3", "wdt";
188 ralink,function = "gpio";