ramips/mt7620: Name DTS files based on scheme
[oweals/openwrt.git] / target / linux / ramips / dts / DIR-860L-B1.dts
1 /dts-v1/;
2
3 #include "mt7621.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9         compatible = "dlink,dir-860l-b1", "mediatek,mt7621-soc";
10         model = "D-Link DIR-860L B1";
11
12         aliases {
13                 led-boot = &led_power_green;
14                 led-failsafe = &led_power_green;
15                 led-running = &led_power_green;
16                 led-upgrade = &led_power_green;
17         };
18
19         memory@0 {
20                 device_type = "memory";
21                 reg = <0x0 0x8000000>;
22         };
23
24         chosen {
25                 bootargs = "console=ttyS0,57600";
26         };
27
28         leds {
29                 compatible = "gpio-leds";
30
31                 power {
32                         label = "dir-860l-b1:orange:power";
33                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
34                 };
35
36                 led_power_green: power2 {
37                         label = "dir-860l-b1:green:power";
38                         gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
39                 };
40
41                 net {
42                         label = "dir-860l-b1:orange:net";
43                         gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
44                 };
45
46                 net2 {
47                         label = "dir-860l-b1:green:net";
48                         gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
49                 };
50         };
51
52         keys {
53                 compatible = "gpio-keys-polled";
54                 poll-interval = <20>;
55
56                 reset {
57                         label = "reset";
58                         gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
59                         linux,code = <KEY_RESTART>;
60                 };
61
62                 wps {
63                         label = "wps";
64                         gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
65                         linux,code = <KEY_WPS_BUTTON>;
66                 };
67         };
68 };
69
70 &spi0 {
71         status = "okay";
72
73         m25p80@0 {
74                 compatible = "jedec,spi-nor";
75                 reg = <0>;
76                 spi-max-frequency = <10000000>;
77
78                 partitions {
79                         compatible = "fixed-partitions";
80                         #address-cells = <1>;
81                         #size-cells = <1>;
82
83                         partition@0 {
84                                 label = "u-boot";
85                                 reg = <0x0 0x30000>;
86                                 read-only;
87                         };
88
89                         partition@30000 {
90                                 label = "u-boot-env";
91                                 reg = <0x30000 0x4000>;
92                                 read-only;
93                         };
94
95                         radio: partition@34000 {
96                                 label = "radio";
97                                 reg = <0x34000 0x4000>;
98                                 read-only;
99                         };
100
101                         factory: partition@38000 {
102                                 label = "factory";
103                                 reg = <0x38000 0x8000>;
104                                 read-only;
105                         };
106
107                         partition@40000 {
108                                 label = "defaults";
109                                 reg = <0x40000 0x10000>;
110                                 read-only;
111                         };
112
113                         partition@50000 {
114                                 compatible = "seama";
115                                 label = "firmware";
116                                 reg = <0x50000 0xfb0000>;
117                         };
118                 };
119         };
120 };
121
122 &pcie {
123         status = "okay";
124 };
125
126 &pcie0 {
127         mt76@0,0 {
128                 reg = <0x0000 0 0 0 0>;
129                 mediatek,mtd-eeprom = <&radio 0x2000>;
130                 ieee80211-freq-limit = <5000000 6000000>;
131         };
132 };
133
134 &pcie1 {
135         mt76@0,0 {
136                 reg = <0x0000 0 0 0 0>;
137                 mediatek,mtd-eeprom = <&radio 0>;
138                 ieee80211-freq-limit = <2400000 2500000>;
139         };
140 };
141
142 &pinctrl {
143         state_default: pinctrl0 {
144                 gpio {
145                         ralink,group = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
146                         ralink,function = "gpio";
147                 };
148         };
149 };